Research on the Implementation of the AGC Loops Unit on the FPGA

被引:0
作者
Aubakirov, Rafail R. [1 ]
Strekopytov, Dmitry V. [1 ]
Aubakirov, Rafael R. [2 ]
Kaleev, Dmitry [1 ]
机构
[1] Natl Res Univ Elect Technol MIET, Inst Syst Microdevices & Control Syst, Zelenograd, Russia
[2] Natl Res Univ Elect Technol MIET, Inst Biomed Syst, Zelenograd, Russia
来源
PROCEEDINGS OF THE 2019 IEEE CONFERENCE OF RUSSIAN YOUNG RESEARCHERS IN ELECTRICAL AND ELECTRONIC ENGINEERING (EICONRUS) | 2019年
关键词
AGC; FPGA; Analysis; Implementation; BPSK;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents the analysis and implementation of algorithms for Automatic Gain Control Loops in the form of a device with FPGA. These algorithms were compared according to the following criteria: calculation accuracy, calculation time, and hardware costs (number of multipliers, etc.). Comparisons were made between models obtained using algorithms implemented in MATLAB and Simulink, and a practical implementation of one of the algorithms on the FPGA was carried out to confirm the reliability of the models obtained.
引用
收藏
页码:1692 / 1695
页数:4
相关论文
共 2 条
  • [1] Nezami MK, 2003, RF ARCHITECTURES DIG
  • [2] Perez JPA, 2011, ANALOG CIRC SIG PROC, P1