Design Issues & Challenges with EMI/EMC in System on Packages (SOPs)

被引:0
作者
Rehpade, Rajesh [1 ]
Pable, S. D. [2 ]
Kharate, G. K. [3 ,4 ]
机构
[1] METs IOE, Dept Elect, Nasik, India
[2] Govt Poly, Dept E&TC, Nasik, India
[3] MCERC, Dept E&TC, Nasik, India
[4] SP Pune Univ, Pune, Maharashtra, India
来源
2017 INTERNATIONAL CONFERENCE OF ELECTRONICS, COMMUNICATION AND AEROSPACE TECHNOLOGY (ICECA), VOL 1 | 2017年
关键词
RPDs; EMI; SOP; Vias; Cavity Resonance; Power planes;
D O I
暂无
中图分类号
V [航空、航天];
学科分类号
08 ; 0825 ;
摘要
Every electronic product has been subjected to EMC/EMI regulations by several international bodies such as FCC, IEC; if the frequency of operation exceeded 9Khz. The interference generated by electronic gadgets was easily manageable in earlier years. As the complexity and speed of circuits increased, intersystem and intrasystem interference gained prominence. The factors such as closely placed conductors, greater number of vias which allow the gadgets become more compact and hence become the inherent source of electromagnetic radiations affecting other devices/circuits on SOP, disregarding them may prove costly in the later stage of the design flow. In today's SOPs, high performance digital LSIs are sources of EMI, while RF and analog circuits are affected by EMI. In future, electronic systems shall require higher bandwidth with lower power consumption to handle massive amount of data, especially for large memory systems, high-definition displays, and high-performance microprocessors, and not only this noise margins shall also reduce due to reductions in power supply voltages, and hence noise voltages generated due to EMI may be comparable to shrinked noise margins, ignoring them may cause the system to malfunction.
引用
收藏
页码:335 / 338
页数:4
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