Impact of Crystallization Method on Poly-Si Tunnel FETs

被引：13

作者：

Chen, Yi-Hsuan ^{[1
]}

Ma, William Cheng-Yu ^{[2
]}

Lin, Jer-Yi ^{[1
]}

Lin, Chun-Yen ^{[1
]}

Hsu, Po-Yang ^{[1
]}

Huang, Chi-Yuan ^{[2
]}

Chao, Tien-Sheng ^{[1
]}

机构：

[1] Natl Chiao Tung Univ, Inst Electrophys, Hsinchu 300, Taiwan

[2] Natl Sun Yat Sen Univ, Dept Elect Engn, Kaohsiung 804, Taiwan

来源：

IEEE ELECTRON DEVICE LETTERS | 2015年 / 36卷 / 10期

关键词：

Tunnel field-effect-transistor (TFET); poly-Si thin-film transistor (poly-Si TFTs); trap density; metal-induced lateral crystallization (MILC); THIN-FILM TRANSISTORS;

D O I：

10.1109/LED.2015.2468060

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this letter, the impact of crystallization method on the electrical characteristics of polycrystalline silicon (poly-Si) tunnel field-effect transistors (TFETs) is investigated. Different crystallization methods may result in different amounts of interface traps (N-it) and bulk traps (N-GB). TFETs crystallized with solid-phase crystallization (SPC) and metal-induced lateral crystallization (MILC) were fabricated and compared. In comparison with the SPC TFETs, the MILC TFETs exhibit similar to 4.5x higher ON-state current I-ON, subthreshold swing reduction Delta S.S. similar to 202 mV/decade, and larger similar to 7.2x ON/OFF current ratio. According to the measurement of a monitor poly-Si thin-film transistor, replacing SPC with MILC results in a reduced N-it similar to 0.60x and a reduced N-GB similar to 0.36x, respectively. It can enhance the gate-to-tunnel junction controllability. Consequently, lowering trap density favors reducing power consumption of TFETs and provides a promising solution for future low-power driving circuits in portable electronics.

引用

页码：1060 / 1062

页数：3

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