High-performance polycrystalline-Si thin film transistors formed by using large-angle-tilt implanted drains

被引：14

作者：

Juang, MH ^{[1
]}

Chiu, YM ^{[1
]}

机构：

[1] Natl Taiwan Univ Sci & Technol, Dept Elect Engn, Taipei 106, Taiwan

来源：

SEMICONDUCTOR SCIENCE AND TECHNOLOGY | 2005年 / 20卷 / 12期

关键词：

D O I：

10.1088/0268-1242/20/12/014

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A novel polycrystalline silicon (poly-Si) thin film transistor (TFT) formed by using the large-angle-tilt-implanted-drain (LATID) scheme has been proposed. The LATID TFT can achieve much smaller off-state leakage than the lightly doped drain (LDD) TFT. The result is attributable to the reduced electric field near the drain region and thus more effective Suppression of carrier emission via trap states. Moreover, the on-state current does not have a large difference in comparison with the LDD TFT, due to the gate-overlapped structure formed by using a simple fabrication process. As a result, a poly-Si TFT with excellent device characteristics and a high on/off Current ratio can be implemented by simply using the LATID fabrication scheme.

引用

页码：1223 / 1225

页数：3

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