Wafer Test Methods to Improve Semiconductor Die Reliability

被引：5
|
作者：
Mann, William R.
机构：
[1] Rockwell International, Newport Beach, CA 92663
来源：
IEEE DESIGN & TEST OF COMPUTERS | 2008年 / 25卷 / 06期
关键词：
Performance evaluation; Process control; Reliability; Reliability engineering; Robustness; Semiconductor device reliability; Testing;
D O I：
10.1109/MDT.2008.174
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Incremental advances in semiconductor device testing have improved device quality and reliability. New test methods applied to dies at the wafer level are now significantly improving the reliability of devices sold to the increasing bare-die market and reducing burn-in requirements for packaged devices.
引用
收藏
页码：528 / 537
页数：10
相关论文
共 50 条
  • [1] An evaluation of fast wafer level test methods for interconnect reliability control
    Foley, S
    Molyneaux, J
    Mathewson, A
    MICROELECTRONICS RELIABILITY, 1999, 39 (11) : 1707 - 1714
  • [2] Test wafer management for semiconductor manufacturing
    Ozelkan, Ertunga C.
    Cakanyildirim, Metin
    IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, 2006, 19 (02) : 241 - 251
  • [3] Improving Semiconductor Reliability with Advanced Engineering Methods in Test Program Development
    Stefan Vock
    Omar Escalona
    Colin Turner
    Journal of Electronic Testing, 2015, 31 : 107 - 117
  • [4] Improving Semiconductor Reliability with Advanced Engineering Methods in Test Program Development
    Vock, Stefan
    Escalona, Omar
    Turner, Colin
    JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2015, 31 (01): : 107 - 117
  • [5] Wafer to Wafer LED Test & Scanning Back End Semiconductor Handler
    Thierry, Eme
    Massimo, Scarpella
    PROCEEDINGS OF THE 2010 34TH IEEE/CPMT INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY CONFERENCE (IEMT 2010), 2011,
  • [6] Simulation of test wafer consumption in a semiconductor facility
    Foster, B
    Meyersdorf, D
    Padillo, JM
    Brenner, R
    ASMC 98 PROCEEDINGS - 1998 IEEE/SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE AND WORKSHOP: THEME - SEMICONDUCTOR MANUFACTURING: MEETING THE CHALLENGES OF THE GLOBAL MARKETPLACE, 1998, : 298 - 302
  • [7] Scheduling of wafer test processes in semiconductor manufacturing
    Ellis, KP
    Lu, Y
    Bish, EK
    INTERNATIONAL JOURNAL OF PRODUCTION RESEARCH, 2004, 42 (02) : 215 - 242
  • [8] Die-to-die Inspection of Semiconductor Wafer using Bayesian Twin Network
    Choi E.
    Kim J.
    IEIE Transactions on Smart Processing and Computing, 2021, 10 (05): : 382 - 389
  • [9] A study to improve wafer productivity and quality in semiconductor slicing
    Dobrescu, Tiberiu
    ANNALS OF DAAAM FOR 2007 & PROCEEDINGS OF THE 18TH INTERNATIONAL DAAAM SYMPOSIUM: INTELLIGENT MANUFACTURING & AUTOMATION: FOCUS ON CREATIVITY, RESPONSIBILITY, AND ETHICS OF ENGINEERS, 2007, : 227 - 228
  • [10] An Accelerated On-Wafer Test to Improve Long-Term Reliability of a 0.25 μm PHEMT Process
    Struble, Wayne
    Barrett, Jason
    Yamujala, Nishant
    2016 IEEE ACCELERATED STRESS TESTING & RELIABILITY CONFERENCE (ASTR), 2016,
12345