Neutron, 64 MeV proton & alpha single-event characterization of Xilinx 16nm FinFET Zynq® UltraScale plus ™ MPSoC

被引：0

作者：

Maillard, Pierre ^{[1
]}

Hart, Michael ^{[1
]}

Barton, Jeff ^{[1
]}

Arver, Jue ^{[1
]}

Smith, Christina ^{[1
]}

机构：

[1] XILINX Inc, 2100 Log Dr, San Jose, CA 95124 USA

来源：

2017 IEEE RADIATION EFFECTS DATA WORKSHOP (REDW) | 2017年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper examines the single-event effect response of the Xilinx 16nm FinFET XCZU9EG Zynq (R) MPSoC irradiated with neutrons, 64 MeV protons and thermal neutrons sources. A 16nm FPGA-like test chip was also built for alpha foil testing. Results for single-event upsets on configuration RAM (CRAM) cells and block RAM (BRAM) cells are provided for the programmable logic. In addition, the 1st Xilinx 16nm FinFET processor (PS) SEE results are also presented.

引用

页码：139 / 143

页数：5

共 11 条

[1] [Anonymous], 2006, 89A JEDEC
[2] BAUMANN R, 1995, 1995 IEEE INTERNATIONAL RELIABILITY PHYSICS PROCEEDINGS, 33RD ANNUAL, P297, DOI 10.1109/RELPHY.1995.513695
[3] Neutron-induced 10B fission as a major source of soft errors in high density SRAMs
Baumann, RC
Smith, EB
[J]. MICROELECTRONICS RELIABILITY, 2001, 41 (02) : 211 - 218
[4] Crocker Nuclear Laboratory (CNL) radiation effects measurement and test facility
Castaneda, CM
[J]. 2001 IEEE RADIATION EFFECTS DATA WORKSHOP, WORKSHOP RECORD, 2001, : 77 - 81
[5] Flocchini R., 2006, DEV LARGE FIELD COLD
[6] The Rosetta experiment: Atmospheric soft error rate testing in differing technology FPGAs
Lesea, A
Drimer, S
Fabula, JJ
Carmichael, C
Alfke, P
[J]. IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2005, 5 (03) : 317 - 328
[7] THE LOS-ALAMOS-NATIONAL-LABORATORY SPALLATION NEUTRON SOURCES
LISOWSKI, PW
BOWMAN, CD
RUSSELL, GJ
WENDER, SA
[J]. NUCLEAR SCIENCE AND ENGINEERING, 1990, 106 (02) : 208 - 218
[8] Maillard P., 2015, RAD EFF DAT WORKSH R
[9] Xilinx Inc. San Jose CA, 2014, UG570 ULTRSCALE ARCH
[10] Xilinx Inc. San Jose CA, 2014, UG570 ULTR ARC CONF

← 1 2 →