A wideband receiver front-end using 1st and 3rd harmonics of the N-path filter response

Harmonic selectivity and inaccessibility to accurate low-power high frequency clock generator are two main imperfections in the tunable N-path filters. In this paper, conventional N-path filter and conventional harmonic rejection (HR) N-path architectures are analyzed, and related equations are derived and are verified by simulation results. Furthermore, a wideband tunable receiver front-end using HR N-path switching systems is proposed. Using third harmonic of filter response instead of fundamental harmonic, the required input clock frequency in the multi-phase clock generator is decreased by a factor of three. The receiver front-end benefits low and high frequency bands. At low frequency band (0.4-1.2 GHz) the first harmonic, and at high frequency band (1.2-3.3 GHz) the third harmonic of filter response are selected and are downconverted to the baseband frequency. The structure is designed and is simulated using CMOS-90 nm technology in schematic level. The total power consumption and are mW and dB, respectively. Furthermore, NF at low and high frequency bands are 2.56 and 3.53 dB, respectively.