A 1.4V 60MHz access, 0.25μm embedded flash EEPROM

被引：1

作者：

Kataoka, T ^{[1
]}

Fuchigami, I ^{[1
]}

Nishida, Y ^{[1
]}

Kimura, T ^{[1
]}

Aruga, R ^{[1
]}

Okuda, Y ^{[1
]}

Michiyama, J ^{[1
]}

机构：

[1] Matsushita Elect Ind Co Ltd, Corp Semicond Dev Div, Sawara Ku, Fukuoka 8140001, Japan

来源：

PROCEEDINGS OF THE IEEE 1999 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 1999年

关键词：

D O I：

10.1109/CICC.1999.777283

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A 1.4V 60MHz Embedded Flash EEPROM has been developed using a word-line booster circuit, a current comparing sense amplifier and an interleave architecture. A new word-line booster circuit which consists of a high performance charge pump, a voltage regulator and a voltage switch has supplied a stable voltage to the word-line decoder from the supply voltage of 1.4V. A clock-synchronized read operation with an interleave architecture has contributed to doubling the maximum operating frequency in the flash EEPROM.

引用

页码：243 / 246

页数：4