A Yield Optimization Methodology for Mixed-Signal Circuits

With technology scaling in the nanometer regime relative variability increases and becomes more complex, making traditional statistical modeling insufficient. To optimize yield, circuit designers need to determine effects of variations on particular circuit designs, which requires statistical modeling. This paper presents a methodology for simple, fast, design specific yield optimization that is accessible to the circuit designer. The methodology utilizes backward propagation and convex optimization techniques to customize existing statistical model cards to a given design. The methodology is verified using comparator offset measurements on a 28nm FDSOI technology. The customized model achieves a mean absolute percentage error of < 4% compared to a 30% error in the original models.