Efficient On-chip Vector Processing for Multicore Processors

被引：0

作者：

Beldianu, Spiridon F. ^{[1
]}

Ziavras, Sotirios G. ^{[1
]}

机构：

[1] New Jersey Inst Technol, Dept Elect & Comp Engn, Newark, NJ 07102 USA

来源：

INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP (SOC) | 2013年

关键词：

vector processing; multicores;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Per-core vector support in multicores is not efficient since applications rarely sustain high DLP. We present two Power Gating (PG) schemes to dynamically control Vector co-Processors (VPs) shared by cores. ASIC and FPGA modeling show that PG can reduce the energy by 33% while maintaining high performance.

引用

页数：4

共 6 条

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[4]

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[6]

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