Discrete phase-locked loop for three-phase systems

被引:0
作者
Escobar, G. [1 ]
Ho, C. N. M. [2 ]
Pettersson, S. [3 ]
Vazquez, G. [4 ]
Ordonez-Lopez, E. E. [5 ]
机构
[1] UADY, Grad Sch Engn, Merida 97115, Yucatan, Mexico
[2] ABB Grp, Newave, CH-6572 Quartino, Ticino, Switzerland
[3] ABB Switzerland Ltd, CRC, CH-5405 Dattwil, Switzerland
[4] ITESI, Lab Elect & Power Elect, Guanajuato 36821, Gto, Mexico
[5] UADY, Sch Engn, Merida 97115, Yucatan, Mexico
来源
IECON 2014 - 40TH ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY | 2014年
关键词
POWER CONVERTERS; SYNCHRONIZATION;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a discrete phase-locked loop (PLL) method aimed to provide an estimation of the angular frequency, and both the positive and negative sequences of the fundamental component of an unbalanced and distorted three-phase reference signal. The design of the proposed scheme is based on a discrete model of the generator of a three-phase signal. This model involves both positive and negative sequences of the fundamental component as well as low harmonic components. It is shown that the proposed method provides a more accurate response than discretized continuous time based PLL methods, especially in cases of digital implementation with low sampling frequency. The proposed method does not require transformation of variables into the synchronous frame coordinates as in most PLL schemes. It includes an explicit harmonic compensation mechanism to reduce the effect of harmonic distortion, and is robust against angular frequency variations, as well as sags and swells in the three-phase reference signal. Numerical results are provided to evaluate the performance of the proposed scheme. Experiments are under development at this moment, and the results will be provided in the final version of the paper.
引用
收藏
页码:4947 / 4953
页数:7
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