Improvement of cell transistors in high-k/metal-gate peripheral transistors technology for high-performance graphic memories

被引：0
|
作者：
Jang, Dongkyu [1 ]
Lee, Jieun [1 ]
Kim, Daekyum [1 ]
Hwang, Doo Hee [2 ]
Nho, Kyoungrock [1 ]
Lee, Inkyum [1 ]
Kim, Shindeuk [1 ]
Park, Taehoon [1 ]
Hong, Hyeongsun [1 ]
机构：
[1] Samsung Elect, Samsung Res, San 16,Banwol Dong, Seoul, Gyeonggi Do, South Korea
[2] Semicond R&D Ctr, Flash Technol Dev Team, Samsung Elect, San 16,Banwol Dong, Hwaseong, Gyeonggi Do, South Korea
来源：
JAPANESE JOURNAL OF APPLIED PHYSICS | 2024年 / 63卷 / 03期
关键词：
DRAM; HBM; Graphic memories; IR reflow; CHALLENGES;
D O I：
10.35848/1347-4065/ad20b4
中图分类号：
O59 [应用物理学];
学科分类号：
摘要：
We investigated characteristics and reliabilities of cell transistors (Cell Tr) in graphics double data rate 7 (GDDR7) DRAM with high-k/metal gate (HKMG) peripheral transistors (Peri Tr), and we suggest the robust and reliable Cell Tr for the HKMG peripheral (Peri) scheme. In the latest graphic DRAMs, the HKMG Peri scheme is equipped to achieve the highest speed at the lowest power consumption, so the Cell Tr must operate stably at a lower driving voltage than other memories. Furthermore, the intrinsic properties of Cell Tr are negatively affected by the reduced thermal budget in the gate-first HKMG Peri scheme. In this paper, we propose a suitable Cell Tr to overcome the influence of the gate-first HKMG Peri scheme and the lowest driving voltage. In addition, we verify the segmental properties of node resistance in Cell Tr and the mechanism of the last data-in PRE command period (tRDL) degradation in graphic memories.
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页数：6
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