共 22 条
- [1] Ahmed M., 2005, P IEEE INT C TEST NO, P246
- [2] [Anonymous], EDA CLOUD CELL BASED
- [3] Brand KA, 2004, INT TEST CONF P, P1128
- [4] Functional Built-in Delay Binning and Calibration Mechanism for on-Chip at-Speed Self Test [J]. 2009 ASIAN TEST SYMPOSIUM, PROCEEDINGS, 2009, : 163 - 168
- [5] Built-in speed grading with a process-tolerant ADPLL [J]. PROCEEDINGS OF THE 16TH ASIAN TEST SYMPOSIUM, 2007, : 384 - 389
- [6] Huang SY, 2016, 2016 INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING & SIMULATION (HPCS 2016), P125, DOI 10.1109/HPCSim.2016.7568325
- [7] A Path Selection Flow for Functional Path Ring Oscillators using Physical Design Data [J]. 2022 IEEE INTERNATIONAL TEST CONFERENCE (ITC), 2022, : 258 - 267
- [8] Lee J, 2008, INT TEST CONF P, P124, DOI 10.1109/ISISE.2008.305
- [9] Cloud-Based Online Ageing Monitoring for IoT Devices [J]. IEEE ACCESS, 2019, 7 (135964-135971) : 135964 - 135971
- [10] High-frequency, at-speed scan testing [J]. IEEE DESIGN & TEST OF COMPUTERS, 2003, 20 (05): : 17 - 25