A four-quadrant analog multiplier using DTMOS for low power applications

被引：4

作者：

Ozer, Emre ^{[1
]}

Basak, Muhammed Emin ^{[2
]}

Kacar, Firat ^{[3
]}

机构：

[1] Istanbul Univ Cerrahpasa, Dept Elect & Energy, TR-34500 Istanbul, Turkey

[2] Yildiz Tech Univ, Fac Naval Architecture & Maritime, Istanbul, Turkey

[3] Istanbul Univ Cerrahpasa, Dept Elect & Elect Engn, Istanbul, Turkey

来源：

INTERNATIONAL JOURNAL OF ELECTRONICS | 2023年 / 110卷 / 04期

关键词：

Analog multiplier; four-quadrant; saturation region; DTMOS; CMOS CURRENT-MODE; LOW-VOLTAGE; DESIGN;

D O I：

10.1080/00207217.2022.2062795

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The four-quadrant analog multipliers (FQAM) are widely used in signal processing applications such as amplitude modulation, frequency doubling, and adaptive filters. In this paper, a FQAM has been realised in dynamic threshold voltage MOSFET (DTMOS) technology. It relies on the square-law characteristics of the MOS transistor. Several simulations have been carried out to assess the operation of the proposed FQAM. The supply voltage is set to +/- 0.2 V, and 68 mu W power consumption is determined. The input signal can be applied to the full scale of the supply voltage. The bandwidth is 22.86 MHz, and the output signal's total harmonic distortion (THD) is less than 2%. Intermodulation products of the output signal have been calculated. Monte Carlo and temperature simulations have been performed in a way that confirms the robustness of the circuit against the technological spread. In summary, low power consumption, wide bandwidth, and linearity are the advantages of the proposed circuit.

引用

页码：753 / 767

页数：15

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