Circuit Reliability of MoS2 Channel Based 2D Transistors

Inverters being the basic logic element of the circuits used, we have demonstrated MoS2-based inverter degradation in terms of various parameters (inverter high output (V-OH), inverter low output (V-OL), rise time (t(r)), gain) under critical stress conditions. These stress conditions include multiple voltage transfer characteristics (V-TC) sweeps, application of 104 pulses at the input of inverter (V-IN), change of output dynamic response with continuous pulses, and long duration DC stress for logic 0 and 1 at V-IN. The percentage degradation in inverter characteristics was found to be increasing with an increase in supply voltage (V-DD) for all the stress cases. Among various stress cases run, VOL increased by 120 mV, V-OH decreased by 150 mV, gain decreased by 500 mV/V, and t(r) increased by 4 mu s. The degradation in inverter key parameters was found to be originated from the deterioration in the performance of the individual driver and load transistors.