Theoretical Analysis and Experimental Characterization of 1.2-kV 4H-SiC Planar Split-Gate MOSFET With Source Field Plate

被引:3
作者
Yu, Hengyu [1 ]
Wang, Jun [1 ]
Zhang, Jinyi [1 ]
Liang, Shiwei [1 ]
Shen, Z. John [1 ,2 ]
机构
[1] Hunan Univ, Coll Elect & Informat Engn, Changsha 410082, Peoples R China
[2] Simon Fraser Univ, Sch Mechatron Syst Engn, Surrey, BC V3T 0A3, Canada
基金
中国国家自然科学基金;
关键词
MOSFET; Logic gates; Electric fields; Switches; Silicon carbide; JFETs; Capacitance; 4H-SiC MOSFET; high-frequency figure-of-merits (HF-FOMs); split gate (SG); source field plate; switching loss;
D O I
10.1109/TED.2023.3336644
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The 1.2-kV-rated 4H-SiC planar split-gate (SG) MOSFET embedding source field plate incorporated between separated gates (termed SFP-SG-MOSFET) is proposed and demonstrated. The utilization of the embedding source field plate in conventional SG-MOSFET (Conv-SG-MOSFETs) serves to alleviate the adverse effects of electric field crowding. It also maintains the minimum reverse transfer capacitance ( C-rss) . As a result, the high-frequency figure-of-merit (HF-FOM) and switching efficiency of the proposed SFP-SG MOSFET are improved compared to those of a conventional planar-gate MOSFET (Conv-PG-MOSFET) while maintaining the same blocking voltage rating. The experimental results demonstrate that Crss of the fabricated devices is reduced by 80% and 53% at V-ds = 0 V and V-ds = 800 V, respectively. Thus, the SFP-SG-MOSFET exhibits HF-FOMs < R-ON x C-rss > 4.9 times lower at V-ds = 0 V and 2.0 times lower at V-ds = 800 V. Furthermore, the switching loss of the SFP-SG-MOSFET is reduced by 25%. This makes it possible for the proposed devices to handle a higher power density.
引用
收藏
页码:1508 / 1512
页数:5
相关论文
共 12 条
  • [1] [Anonymous], 2018, TCAD SENTAURUS DEVIC
  • [2] Silicon Carbide Power Devices: Progress and Future Outlook
    Baliga, B. Jayant
    [J]. IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, 2023, 11 (03) : 2400 - 2411
  • [3] A Novel 1.2 kV 4H-SiC Buffered-Gate (BG) MOSFET: Analysis and Experimental Results
    Han, Kijeong
    Baliga, B. J.
    Sung, Woongje
    [J]. IEEE ELECTRON DEVICE LETTERS, 2018, 39 (02) : 248 - 251
  • [4] Split-Gate 1.2-kV 4H-SiC MOSFET: Analysis and Experimental Validation
    Han, Kijeong
    Baliga, B. J.
    Sung, Woongje
    [J]. IEEE ELECTRON DEVICE LETTERS, 2017, 38 (10) : 1437 - 1440
  • [5] Kim Dongyoung, 2023, 2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD), P350, DOI 10.1109/ISPSD57135.2023.10147505
  • [6] Overview of Wide/Ultrawide Bandgap Power Semiconductor Devices for Distributed Energy Resources
    Mazumder, Sudip K.
    Voss, Lars F.
    Dowling, Karen M.
    Conway, Adam
    Hall, David
    Kaplar, Robert J.
    Pickrell, Gregory W.
    Flicker, Jack
    Binder, Andrew T.
    Chowdhury, Srabanti
    Veliadis, Victor
    Luo, Fang
    Khalil, Sameh
    Aichinger, Thomas
    Bahl, Sandeep R.
    Meneghini, Matteo
    Charles, Alain B.
    [J]. IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, 2023, 11 (04) : 3957 - 3982
  • [7] Adaptive Gate Delay-Time Control of Si/SiC Hybrid Switch for Efficiency Improvement in Inverters
    Peng, Zishun
    Wang, Jun
    Liu, Zeng
    Li, Zongjian
    Wang, Daming
    Dai, Yuxing
    Zeng, Guoqiang
    Shen, Z. John
    [J]. IEEE TRANSACTIONS ON POWER ELECTRONICS, 2021, 36 (03) : 3437 - 3449
  • [8] A NEW VDMOSFET STRUCTURE WITH REDUCED REVERSE TRANSFER CAPACITANCE
    SAKAI, T
    MURAKAMI, N
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1989, 36 (07) : 1381 - 1386
  • [9] Design and Optimization of 1.2-kV SiC Planar Inversion MOSFET Using Split Dummy Gate Concept for High-Frequency Applications
    Vudumula, Pavan
    Kotamraju, Siva
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2019, 66 (12) : 5266 - 5271
  • [10] The Trench Power MOSFET: Part I-History, Technology, and Prospects
    Williams, Richard K.
    Darwish, Mohamed N.
    Blanchard, Richard A.
    Siemieniec, Ralf
    Rutter, Phil
    Kawaguchi, Yusuke
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2017, 64 (03) : 674 - 691