Analysis and Optimization of Sidewall Roughness on Microwave Performance of Through-Glass Vias in 3-D Integrated Circuits

被引：18

作者：

Fang, Zhen ^{[1
]}

Zhang, Jihua ^{[1
]}

Liu, Jinxu ^{[1
]}

Chen, Hongwei ^{[1
]}

Gao, Libin ^{[1
]}

Yang, Xiaolin ^{[2
]}

Li, Wenlei ^{[1
]}

Cai, Xingzhou ^{[3
]}

Guo, Huan

机构：

[1] Univ Elect Sci & Technol China, Sch Integrated Circuit Sci & Engn, State Key Lab Elect Thin Films & Integrated Device, Chengdu, Peoples R China

[2] Univ Elect Sci & Technol China, Sch Phys, Chengdu 610054, Peoples R China

[3] Chengdu Microtechnol Co Ltd, Chengdu 611731, Peoples R China

来源：

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES | 2024年 / 72卷 / 01期

关键词：

Correction factors; glass 3-D integrated circuits (ICs); laser-induced wet etching (LIWE); sidewall roughness; through-glass vias (TGVs); S-PARAMETERS; SURFACE;

D O I：

10.1109/TMTT.2023.3280945

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The integrity and reliability of signal transmission in glass 3-D integrated circuits (ICs) can be improved by studying the effect of sidewall roughness of through-glass vias (TGVs) on microwave performance. Thus, in this study, the effect of different sidewall roughness of TGVs on the electrical characteristics, such as loss, delay, and impedance correction factors, are analyzed by extracting S-parameters from the CPW-TGVs-CPW model. An accurate RLGC electrical model of TGVs that considers sidewall roughness is proposed. The correction factor of inductance is verified and found to be greater than that of resistance through simulation, physical measurements, and microscopic characterization analysis. Meanwhile, the sidewall roughness was improved by controlling the laser-induced wet etching (LIWE) process of TGVs. It was greatly reduced from 1.257 $\mu $ m to 25 nm. The proposed electrical model is accurately verified below 40 GHz by extracting the electrical parameters of TGVs with different sidewall roughness.

引用

页码：54 / 63

页数：10

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