High-performance montgomery modular multiplier with NTT and negative wrapped convolution

被引:0
|
作者
Ke, Hongfei [1 ]
Li, Hao [1 ]
Zhang, Peiyong [1 ]
机构
[1] Zhejiang Univ, Sch Micronano Elect, Hangzhou 310058, Peoples R China
基金
国家重点研发计划;
关键词
Number theoretic transform; Negative wrapped convolution; Montgomery modular multiplication; Parallel computation; TRANSFORMS;
D O I
10.1016/j.mejo.2023.106085
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Modular multiplication plays a crucial role in modern cryptography. Montgomery modular multiplication(MMM), one of the most classic and practical modular multiplication algorithms, has been widely used in cryptographic algorithms such as RSA, Diffie-Hellman algorithm, and Elliptic Curve Cryptography. In this paper, we incorporate negative wrapped convolution (NWC) into the FFT-based Montgomery modular multiplication to avoid the issue of zero-padding and use carry-save arithmetics for parallel computation. By utilizing coefficient pairs (pos_part and neg_part), we reconstruct the final result and eliminate the restrictions imposed by nega-cyclic parts. Moreover, Karatsuba-like algorithm is introduced for building fine-grained large integer multipliers. We have modified the parameter specifications for our design to meet requirements from diverse application scenarios. We implement the design on Xilinx Virtex-7 FPGA under different conditions and compare the results with the state-of-the-art MMM designs. The comparisons confirm that our design has the following characteristics: low latency for process, competitive area-latency-product(ALP), efficient DSP usage, and constant delay, which enhances security against timing attacks.
引用
收藏
页数:11
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