Design Constraints Generalization for Series-Stacked Buffer-Based Active DC Links

被引：2

作者：

Strajnikov, Pavel ^{[1
]}

Amar, Nissim ^{[2
]}

Yuhimenko, Vladimir ^{[1
]}

Aharon, Ilan ^{[2
]}

Kuperman, Alon ^{[1
]}

机构：

[1] Ben Gurion Univ Negev, Sch Elect & Comp Engn, IL-8410501 Beer Sheva, Israel

[2] Ariel Univ, Dept Elect & Elect Engn, IL-40700 Ariel, Israel

来源：

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS | 2024年 / 71卷 / 02期

关键词：

Active dc link (ADCL); reduced rating converter; series-stacked buffer (SSB);

D O I：

10.1109/TIE.2023.3260341

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Series-stacked buffer (SSB)-based active dc links aim to increase power density by replacing bulky dc link capacitor with series connection of significantly lower valued capacitor and auxiliary bidirectional dc/ac converter. SSB design constraint describing quantitative relation between passive components values and system power rating was established to achieve minimal remaining dc link voltage ripple magnitude. This letter generalizes the above requirement, revealing that allowing nonminimum magnitude of residual dc link voltage ripple releases other design constraints, yielding a more optimal solution in terms of full-rating capacitance utilized and/or auxiliary bidirectional dc/ac converter volt-ampere rating. Experimental results validate the proposed methodology, matching corresponding analytical predictions.

引用

页码：2133 / 2136

页数：4

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