Studies of Performance of Cs2TiI6-XBrX (Where x=0 to 6)-Based Mixed Halide Perovskite Solar Cell with CdS Electron Transport Layer

The present research work represents the numerical study of the device performance of a lead-free Cs2TiI6-XBrX-based mixed halide perovskite solar cell (PSC), where x = 1 to 5. The open circuit voltage (V-OC) and short circuit current (J(SC)) in a generic TCO/electron transport layer (ETL)/absorbing layer/hole transfer layer (HTL) structure are the key parameters for analyzing the device performance. The entire simulation was conducted by a SCAPS-1D (solar cell capacitance simulator- one dimensional) simulator. An alternative FTO/CdS/Cs2TiI6-XBrX/CuSCN/Ag solar cell architecture has been used and resulted in an optimized absorbing layer thickness at 0.5 mu m thickness for the Cs2TiBr6, Cs2TiI1Br5, Cs2TiI2Br4, Cs2TiI3Br3 and Cs2TiI4Br2 absorbing materials and at 1.0 mu m and 0.4 mu m thickness for the Cs2TiI5Br1 and Cs2TiI6 absorbing materials. The device temperature was optimized at 40 degrees C for the Cs2TiBr6, Cs2TiI1Br5 and Cs2TiI2Br4 absorbing layers and at 20 degrees C for the Cs2TiI3Br3, Cs2TiI4Br2, Cs2TiI5Br1 and Cs2TiI6 absorbing layers. The defect density was optimized at 10(10) (cm(-3)) for all the active layers.