Doherty power amplifier output networks with maximized bandwidth

A method is presented to optimize the combining network and the post-matching network of a Doherty power amplifier (DPA) for maximizing the bandwidth. For widely applicable results, RF power transistors are approximated in the large-signal regime using a simple analytical model with a few parameters. A definition of bandwidth of DPA is given, which involves gain and efficiency at full-power and 6 dB backoff. Different combining network topologies are compared in terms of this bandwidth definition. The element values are optimized using two factors, one to scale the combining node impedance and the other to scale the impedance seen by the transistors. For each optimized topology, explicit formulas are given resulting in the element values in terms of the optimized values and a few transistor parameters. The method presented also leads to a proper selection of the post-matching network.