An Improved Coupled FECircuit Model for Turn-to-Turn Short-Circuit Faults Inside Converter Transformers

Turn-to-turn short-circuit (TTSC) faults, which are among the most common and potentially threatening faults inside large-capacity converter transformers, can lead to catastrophic accidents and causalities. Due to the lack of a proper model, the reproduction and analysis of actual TTSC faults remain difficult challenges. In this article, converter transformer TTSC faults are numerically investigated by directly coupling an internal finite-element (FE) model with a model of the external electric circuit. In every calculation step, data are automatically transferred between the FE and circuit domains, and the simulations for the winding magnetic leakage flux and fault current are executed simultaneously. Furthermore, the Hochrainer arc model is used to simulate the nonlinear conductance of the low-impedance arc shorting adjacent turns; this model is directly integrated into the short-circuit loop by means of user-defined code. A realistic 405.2-MVA/500-kV single-phase three-core-limb converter transformer within an ultrahigh voltage (UHV) converter system is modeled as a simulation case and subjected to various TTSC faults. Direct comparisons reveal agreement between the calculated results and the recorded fault data, indicating that the approach can reproduce actual faults, thus offering advantages as a replacement for dangerous and costly on-site short-circuit tests in converter transformers.