High-Level Topology Synthesis Method for Δ-Σ Modulators via Bi-Level Bayesian Optimization

Designing high-performance Delta-Sigma modulators is a challenging task, often involving a time-consuming, manual topology search process. We present an automated topology synthesis method for Delta-Sigma modulators that significantly improves efficiency in the search for reliable modulator topologies. Our bi-level Bayesian optimization algorithm provides a 41.2%, 24.2%, and 20.2% improvement in FOM compared to random sampling, evolution-based, and general single-level Bayesian optimization methods, respectively. It also achieves a 2.84x speedup compared to single-level BO while achieving the same optimization goal. Our proposed framework allows for better topology-level exploration than existing high-level synthesis software for Delta-Sigma modulators, as demonstrated by a case study of a novel high-performance architecture synthesized by our method. The source code and supplementary material are released on GitHub.