Comprehensive Analysis and Optimization of Parasitic Capacitance on Conducted EMI and Switching Losses in Hybrid-Packaged SiC Power Modules

被引:8
|
作者
Zhang, Yifan [1 ]
Xie, Yue [1 ]
Chen, Cai [1 ]
Guo, Xinyue [1 ]
Yan, Yiyang [1 ]
Yang, Lei [2 ]
Kang, Yong [1 ]
机构
[1] Huazhong Univ Sci & Technol, Sch Elect & Elect Engn, Wuhan 430074, Peoples R China
[2] Beijing Inst Precis Mechatron & Controls, Beijing 100076, Peoples R China
基金
中国国家自然科学基金;
关键词
ElectroMagnetic Interference (EMI); packaging structure; parasitic parameters; power module; switching loss; COMMON-MODE NOISE; IMPLEMENTATION; TEMPERATURE;
D O I
10.1109/TPEL.2023.3306892
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The high switching speeds of Wide BandGap (WBG) devices promise further breakthroughs in the development of power modules. However, parasitic parameters bring more adverse effects at high-speed switching conditions, which makes WBG bring more power loss and ElectroMagnetic Interference (EMI) problems. In this article, a 1200-V/24-A SiC half-bridge power module is presented with ultralow parasitic capacitance and inductance for low common-mode (CM) EMI and low power loss. This module is designed from a stacked substrate hybrid package structure by optimizing the layout pattern. The effects of parasitic capacitance on the switching loss and conducted EMI of SiC devices are comprehensively investigated based on the analysis models. And the parasitic capacitance reduction methods and the tradeoff optimization for geometrical parameters are given accordingly. The power module's layout is designed, optimized, and fabricated based on the analysis results. The proposed SiC half-bridge module reduces CM current by 17 dB and total switching loss by 28.5% compared to discrete devices. Experimental results validate the superior performance of the optimized module.
引用
收藏
页码:13988 / 14003
页数:16
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