Synaptic Transistor Based on In-Ga-Zn-O Channel and Trap Layers with Highly Linear Conductance Modulation for Neuromorphic Computing

被引:24
作者
Park, Junhyeong [1 ,2 ]
Jang, Yuseong [1 ,2 ]
Lee, Jinkyu [1 ,2 ]
An, Soobin [1 ,2 ]
Mok, Jinsung [1 ,2 ]
Lee, Soo-Yeon [1 ,2 ]
机构
[1] Seoul Natl Univ, Dept Elect & Comp Engn, Seoul 08826, South Korea
[2] Seoul Natl Univ, Interuniv Semicond Res Ctr ISRC, Seoul 08826, South Korea
基金
新加坡国家研究基金会;
关键词
degenerate; indium-gallium-zinc-oxide; neuromorphic computing; synapse plasticity; synaptic transistors; MEMORY; PERFORMANCE; IMPACT; FILMS;
D O I
10.1002/aelm.202201306
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
Brain-inspired neuromorphic computing has drawn significant attraction as a promising technology beyond von Neumann architecture by using the parallel structure of synapses and neurons. Various artificial synapse configurations and materials have been proposed to emulate synaptic behaviors for human brain functions such as memorizing, learning, and visual processing. Especially, the memory type indium-gallium-zinc-oxide (IGZO) synaptic transistor adopting a charge trapping layer (CTL) has the advantages of high stability and a low leakage current of the IGZO channel. However, the CTL material should be carefully selected and optimized to overcome the low de-trapping efficiency, resulting from difficulty in inducing holes in the IGZO channel. In this paper, IGZO is adopted as a CTL and found out that making it degenerated is crucial to improving de-trapping efficiency. The degenerate CTL, where electrons remain as free electrons, induces Fowler-Nordheim tunneling by increasing the electric field across the tunneling layer. As a result, the synaptic transistor represents a high linearity of potentiation (a(p): -0.03) and depression (a(d): -0.47) with 64 conductance levels, which enables the spiking neural network simulation to achieve high accuracy of 98.08%. These experimental results indicate that the synapse transistor can be one of the promising candidates for neuromorphic applications.
引用
收藏
页数:10
相关论文
共 57 条
  • [1] Pattern classification by memristive crossbar circuits using ex situ and in situ training
    Alibart, Fabien
    Zamanidoost, Elham
    Strukov, Dmitri B.
    [J]. NATURE COMMUNICATIONS, 2013, 4
  • [2] CAN PROGRAMMING BE LIBERATED FROM VON NEUMANN STYLE - FUNCTIONAL STYLE AND ITS ALGEBRA OF PROGRAMS
    BACKUS, J
    [J]. COMMUNICATIONS OF THE ACM, 1978, 21 (08) : 613 - 641
  • [3] A review of the integrate-and-fire neuron model: I. Homogeneous synaptic input
    Burkitt, A. N.
    [J]. BIOLOGICAL CYBERNETICS, 2006, 95 (01) : 1 - 19
  • [4] Improving linearity by introducing Al in HfO2 as a memristor synapse device
    Chandrasekaran, Sridhar
    Simanjuntak, Firman Mangasa
    Saminathan, R.
    Panda, Debashis
    Tseng, Tseung-Yuen
    [J]. NANOTECHNOLOGY, 2019, 30 (44)
  • [5] NeuroSim: A Circuit-Level Macro Model for Benchmarking Neuro-Inspired Architectures in Online Learning
    Chen, Pai-Yu
    Peng, Xiaochen
    Yu, Shimeng
    [J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2018, 37 (12) : 3067 - 3080
  • [6] Monochromatic light-assisted erasing effects of In-Ga-Zn-O thin film transistor memory with Al2O3/Zn-doped Al2O3/Al2O3 stacks
    Chen, Sun
    Zhang, Wen-Peng
    Cui, Xing-Mei
    Ding, Shi-Jin
    Sun, Qing-Qing
    Zhang, Wei
    [J]. APPLIED PHYSICS LETTERS, 2014, 104 (10)
  • [7] Modulation of optical and electrical properties of sputtering-derived amorphous InGaZnO thin films by oxygen partial pressure
    Chen, X. F.
    He, G.
    Liu, M.
    Zhang, J. W.
    Deng, B.
    Wang, P. H.
    Zhang, M.
    Lv, J. G.
    Sun, Z. Q.
    [J]. JOURNAL OF ALLOYS AND COMPOUNDS, 2014, 615 : 636 - 642
  • [8] AND Flash Array Based on Charge Trap Flash for Implementation of Convolutional Neural Networks
    Choi, Hyun-Seok
    Kim, Hyungjin
    Lee, Jong-Ho
    Park, Byung-Gook
    Kim, Yoon
    [J]. IEEE ELECTRON DEVICE LETTERS, 2020, 41 (11) : 1653 - 1656
  • [9] A Highly Linear Neuromorphic Synaptic Device Based on Regulated Charge Trap/Detrap
    Choi, Jong-Moon
    Park, Eun-Je
    Woo, Je-Joong
    Kwon, Kee-Won
    [J]. IEEE ELECTRON DEVICE LETTERS, 2019, 40 (11) : 1848 - 1851
  • [10] Loihi: A Neuromorphic Manycore Processor with On-Chip Learning
    Davies, Mike
    Srinivasa, Narayan
    Lin, Tsung-Han
    Chinya, Gautham
    Cao, Yongqiang
    Choday, Sri Harsha
    Dimou, Georgios
    Joshi, Prasad
    Imam, Nabil
    Jain, Shweta
    Liao, Yuyun
    Lin, Chit-Kwan
    Lines, Andrew
    Liu, Ruokun
    Mathaikutty, Deepak
    Mccoy, Steve
    Paul, Arnab
    Tse, Jonathan
    Venkataramanan, Guruguhanathan
    Weng, Yi-Hsin
    Wild, Andreas
    Yang, Yoonseok
    Wang, Hong
    [J]. IEEE MICRO, 2018, 38 (01) : 82 - 99