A physical-based model for on-chip double-layer spiral inductors with a ground shield

被引：1

作者：

Yang, Yintang ^{[1
]}

Lan, Haokun ^{[1
]}

Zhang, Jianqiang ^{[1
]}

Liu, Maliang ^{[1
]}

机构：

[1] Xidian Univ, Sch Microelect, Xian, Shaanxi, Peoples R China

来源：

MICROWAVE AND OPTICAL TECHNOLOGY LETTERS | 2023年 / 65卷 / 01期

关键词：

ground shield; on-chip inductance; parameter extraction; skin and proximity effects; PI EQUIVALENT-CIRCUIT; PARAMETER EXTRACTION;

D O I：

10.1002/mop.33460

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A physical-based analytical model for double-layer inductors to reduce the on-chip area occupied is presented. A simple DC inductance model is developed based on self-inductance and mutual inductance of metal segments. A new method has been adopted to accurately estimate the nonuniform distribution of currents due to skin and proximity effects, and a ladder structure is used to characterize them. Dielectric and substrate electric effects are analyzed, and a ground shield is used to reduce losses. The effective inductance reduction due to the eddy current in the silicon substrate is modeled by a negative mutual inductance between the metal spiral lines and the substrate. All the model parameters can be calculated from the structure sizes and process parameters. On-chip inductors with different parameters were fabricated for the verifications. The EM simulated results and measured results are in good agreement with the proposed model. Thus, it is suitable for different technologies. This model can facilitate the design and optimization of on-chip inductors for RF IC applications.

引用

页码：87 / 97

页数：11

共 20 条

[1] Modeling of impedance of rectangular cross-section conductors [J].

Chen, HB ;

Fang, JY .

ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, 2000, :159-162

[2] Modeling and Parameter Extraction of CMOS On-Chip Spiral Inductors With Ground Shields [J].

Ding, Bowen ;

Yuan, Shengyue ;

Zhao, Chen ;

Tian, Tong .

IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, 2017, 27 (05) :431-433

[3] HIGH-SPEED VLSI INTERCONNECT MODELING BASED ON S-PARAMETER MEASUREMENTS [J].

EO, Y ;

EISENSTADT, WR .

IEEE TRANSACTIONS ON COMPONENTS HYBRIDS AND MANUFACTURING TECHNOLOGY, 1993, 16 (05) :555-562

[4] A mm-Wave CMOS LC-VCO With Vertically-Coiled Solenoid Inductor [J].

Gao, Haijun ;

Liu, Jun ;

Wang, Jie ;

Sun, Lingling ;

Ardouin, Bertrand .

IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, 2016, 26 (04) :282-284

[5] DESIGN OF PLANAR RECTANGULAR MICROELECTRONIC INDUCTORS [J].

GREENHOUSE, HM .

IEEE TRANSACTIONS ON PARTS HYBRIDS AND PACKAGING, 1974, PH10 (02) :101-109

[6] Frequency-independent asymmetric double-π equivalent circuit for on-chip spiral inductors:: Physics-based modeling and parameter extraction [J].

Huang, Fengyi ;

Lu, Jingxue ;

Jiang, Nan ;

Zhang, Xiaowen ;

Wu, Wengang ;

Wang, Yangyuan .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2006, 41 (10) :2272-2283

[7] Characteristic-function approach to parameter extraction for asymmetric equivalent circuit of on-chip spiral inductors [J].

Huang, FY ;

Jiang, N ;

Bian, EL .

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2006, 54 (01) :115-119

[8] A physical model for on-chip spiral inductors with accurate substrate modeling [J].

Huo, X. ;

Chan, Philip C. H. ;

Chen, Kevin J. ;

Luong, Howard C. .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2006, 53 (12) :2942-2949

[9] Analytical Equivalent Circuit Extraction Procedure for Broadband Scalable Modeling of Three-Port Center-Tapped Symmetric On-Chip Inductors [J].

Issakov, Vadim ;

Kehl-Waas, Sebastian ;

Breun, Sascha .

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2019, 66 (09) :3557-3570

[10] A Scalable, Broadband, and Physics-Based Model for On-Chip Rectangular Spiral Inductors [J].

Jayaraman, Sathya Sree ;

Vanukuru, Venkata ;

Nair, Deleep ;

Chakravorty, Anjan .

IEEE TRANSACTIONS ON MAGNETICS, 2019, 55 (09)

← 1 2 →