A Resource Efficient CNN Accelerator for Sensor Signal Processing Based on FPGA

被引:0
|
作者
Wu, Ruidong [1 ]
Liu, Bing [1 ]
Fu, Ping [1 ]
Chen, Haolin [1 ]
机构
[1] Harbin Inst Technol, Sch Elect & Informat Engn, Harbin 150001, Heilongjiang, Peoples R China
基金
中国国家自然科学基金;
关键词
CNN; FPGA; efficient accelerator; sensor signal processing; SVM;
D O I
10.1142/S0218126623500755
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
With the use of Convolutional Neural Network (CNN) in the application of sensor signal processing system, it usually faces the urgent requirements of system integration, high throughput, hardware resource and energy efficiency. This paper introduces a resource efficient accelerator with general two-dimensional multiply-add array operator to focus on the characteristic of sensor signal processing, which can be applied to standard CNN, depth-wise CNN, Fully Connected (FC) layer for varied networks. Meanwhile, resource estimation model is also constructed to provide the exploration of parallel parameters for computing efficiency. Finally, a board-level verification is implemented to demonstrate the efficiency of proposed accelerator with common scene of LeNet and complex scene of MobileNetV1. Experimental results show that the Inferences Per Second (IPS) of 332225 and 1498 is realized with 100MHz frequency. The corresponding efficiency is 88.84% and 61.09%, which outperforms other related works about CNN accelerator design in terms of signal processing. This paper is also applicable and scalable to other fields about effective acceleration research.
引用
收藏
页数:17
相关论文
共 50 条
  • [41] RRAM Based Buffer Design for Energy Efficient CNN Accelerator
    Guo, Kaiyuan
    Yu, Jincheng
    Ning, Xuefei
    Hu, Yiming
    Wang, Yu
    Yang, Huazhong
    2018 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI), 2018, : 435 - 440
  • [42] Efficient FPGA-based FIR - architecture and its significance in ultrasonic signal processing
    Tiwari, Kumar Anubhav
    Ostreika, Armantas
    Platuziene, Jurate
    JOURNAL OF VIBROENGINEERING, 2017, 19 (08) : 6423 - 6432
  • [43] An OpenCL-Based Hybrid CNN-RNN Inference Accelerator On FPGA
    Sun, Yunfei
    Liu, Brian
    Xu, Xianchao
    2019 INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (ICFPT 2019), 2019, : 283 - 286
  • [44] An FPGA-Based Reconfigurable CNN Training Accelerator Using Decomposable Winograd
    Wang, Hui
    Lu, Jinming
    Lin, Jun
    Wang, Zhongfeng
    2023 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, ISVLSI, 2023, : 175 - 180
  • [45] Digital Signal Processing practice Based on FPGA
    Lv, Xiangzhi
    Wu, Qiong
    2011 INTERNATIONAL CONFERENCE ON SOFTWARE ENGINEERING AND MULTIMEDIA COMMUNICATION, 2011, : 184 - +
  • [46] Study of Grating Signal Processing Based on FPGA
    Zhu, Yifeng
    Yang, Xu
    Shi, Lei
    Li, Yanfu
    MECHATRONICS AND INTELLIGENT MATERIALS II, PTS 1-6, 2012, 490-495 : 1807 - 1810
  • [47] FPGA-based Garbling Accelerator with Parallel Pipeline Processing
    Oishi, Rin
    Kadomoto, Junichiro
    Irie, Hidetsugu
    Sakai, Shuichi
    IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2023, E106D (12) : 1988 - 1996
  • [48] HARDWARE ACCELERATOR: IMPLEMENTATION OF CNN ON FPGA FOR DIGIT RECOGNITION
    Choudhari, Onkar
    Chopade, Marisha
    Chopde, Sourabh
    Dabhadkar, Swarali
    Ingale, V
    2020 24TH INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AND TEST (VDAT), 2020,
  • [49] Power modeling and efficient FPGA implementation of FHT for signal processing
    Amira, Abbes
    Chandrasekaran, Shrutisagar
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2007, 15 (03) : 286 - 295
  • [50] A CNN Accelerator on FPGA using Binary Weight Networks
    Tsai, Tsung-Han
    Ho, Yuan-Chen
    2020 IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS - TAIWAN (ICCE-TAIWAN), 2020,