A Shifting Current Mirror Driver Circuit for Electrical Impedance Tomography Applications

被引：4

作者：

Huang, Jiajie ^{[1
,2
]}

Wang, Chao ^{[1
,2
]}

Zhou, Ting ^{[1
,2
]}

Lu, Wangzilu ^{[1
,2
]}

Zhao, Yang ^{[1
,2
]}

Liu, Yan ^{[1
,2
]}

Li, Yongfu ^{[1
,2
]}

机构：

[1] Shanghai Jiao Tong Univ, Dept Micronano Elect, Shanghai 200240, Peoples R China

[2] Shanghai Jiao Tong Univ, MoE Key Lab Artificial Intelligence, Shanghai 200240, Peoples R China

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2023年 / 70卷 / 10期

关键词：

Electrical impedance tomography (EIT); current driver (CD); current mirror; data weight averaging (DWA); dynamic element matching (DEM); SIGMA; SOC;

D O I：

10.1109/TCSII.2023.3288909

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This brief describes a high power efficiency, high linearity current driver for wearable electrical impedance tomography (EIT). It is extremely important to improve the power efficiency of the current driver circuit for wearable EIT applications because it consumes the majority of the power. As such, we propose a multi-stage shifting current mirror (S-CM) current-steering current driver circuit with customized dynamic element matching (DEM) techniques to suppress harmonic distortion (HD) to the greatest extent. Furthermore, the placement of switches in the current mirror circuit is optimized to reduce glitches during the switching phases. Operating between 14 MHz to 56 MHz, the power consumptions for the current mirror and the digital control logic are 21.6-141.6 mu W and 64.8-438 mu W, respectively. The proposed circuit has demonstrated an excellent energy efficiency of 0.3 mu W/kHz while maintaining a total harmonic distortion (HD) of <-43 dB (0.7%).

引用

页码：3832 / 3836

页数：5

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