Hybrid Pulse-Width Modulation Strategy With Reduced High-Frequency Common-Mode Voltage to Lower RMS Motor Leakage Current for a Three-Level Neutral Point Clamped Converter

被引:1
|
作者
Pham, Khoa Dang [1 ]
Doi, Mon-Van [2 ]
Nguyen, Nho-Van [1 ]
机构
[1] Ho Chi Minh City Univ Technol, Fac Elect & Elect Engn, Ho Chi Minh City 70000, Vietnam
[2] Vietnam Natl Univ Ho Chi Minh City, Ho Chi Minh City 70000, Vietnam
关键词
Voltage; Harmonic distortion; Switches; Modulation; Leakage currents; Pulse width modulation; Voltage control; Common-mode voltage; leakage current; neutral point clamped inverter; pulse-width modulation strategy; BEARING CURRENTS; INVERTERS; SUPPRESSION; SCHEME;
D O I
10.1109/ACCESS.2023.3336767
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Due to the capacitive nature of Common-mode impedance, high-frequency Common-mode voltage due to high switching frequency leads to an increase in RMS leakage current, which, in turn, causes higher power loss, Electromagnetic Interferences, and deteriorated harmonic distortion in the three-level Neutral-Point-Clamped converter. Recently-proposed pulse-width modulation type 1 with reduced Common-mode-voltage magnitudes, zero average Common-mode-voltage, and improved harmonic distortion has been presented for the three-level Neutral-Point-Clamped converter. However, the high-frequency Common-mode voltage could be further mitigated by reducing the number of CMV variations. Therefore, this article presents a hybrid pulse-width modulation scheme featuring reduced Common-mode-voltage magnitudes and variations, zero average Common-mode-voltage, and improved harmonic distortion. The Common-mode-voltage variation reduction is realized by re-arranging the order of the switching states in the recently-proposed scheme in a carrier period. The resulting modified sequences type 1 suffer simultaneous switchings between two phase-legs, hence leading to Common-mode-voltage spike due to deadtime. Hence, another type of modified sequences (type 2) is utilized with the modified sequences type 1 and the information of three-phase currents, hence the term "hybrid". Results under Volt-per-Hertz-2.2KW-rated induction motor with different loading conditions in the Three-Level Neutral-Point-Clamped Converters indicate that at rated frequency of 50Hz, the proposed scheme leads to a noticeable decrease in RMS leakage current while producing similar-to-better harmonic distortion at the expense of slight reduction of the efficiency of a converter as opposed to the recently-proposed Reduced-Common-mode-voltage Pulse-width modulation type 1 with improved switching loss and Phase-Opposition-Disposition-Sinusoidal Pulse-width modulation.
引用
收藏
页码:131302 / 131318
页数:17
相关论文
共 38 条
  • [11] A New Active Common-Mode Voltage Elimination Method For Three-Level Neutral-Point Clamped Inverters
    Alawieh, H.
    Tehrani, K. Arab
    Azzouz, Y.
    Dakyo, B.
    IECON 2014 - 40TH ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY, 2014, : 1060 - 1066
  • [12] Novel Modulation Strategy to Achieve Neutral-point Voltage Balance, Common-mode Voltage, and Switching Loss Reduction for Neutral-point Clamped Three-level Inverters
    Liu, Donghan
    Wang, Jinping
    Liu, Shengyu
    Jiang, Weidong
    CHINESE JOURNAL OF ELECTRICAL ENGINEERING, 2024, 10 (04): : 106 - 118
  • [13] A Reduced Common-Mode-Voltage Pulsewidth Modulation Method With Output Harmonic Distortion Minimization for Three-Level Neutral-Point-Clamped Inverters
    Khoa Dang Pham
    Nho Van Nguyen
    IEEE TRANSACTIONS ON POWER ELECTRONICS, 2020, 35 (07) : 6944 - 6962
  • [14] Active Modulation Strategy for Capacitor Voltage Balancing of Three-Level Neutral-Point-Clamped Converters in High-Speed Drives
    Guo, Feng
    Yang, Tao
    Li, Chen
    Bozhko, Serhiy
    Wheeler, Patrick
    IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2022, 69 (03) : 2276 - 2287
  • [15] Carrier-based generalised discontinuous pulse-width modulation strategy with flexible neutral-point voltage control and optimal losses for a three-level converter
    Ren, Kangle
    Zhang, Xing
    Wang, Fusheng
    Cao, Renxian
    IET POWER ELECTRONICS, 2016, 9 (09) : 1862 - 1872
  • [16] Improved SVPWM vector selection approaches in OVM region to reduce common-mode voltage for three-level neutral point clamped-inverter
    Bharatiraja, C.
    Jeevananthan, S.
    Munda, J. L.
    Latha, R.
    INTERNATIONAL JOURNAL OF ELECTRICAL POWER & ENERGY SYSTEMS, 2016, 79 : 285 - 297
  • [17] Optimal space vector pulse width modulation strategy of neutral point clamped three-level inverter for output current ripple reduction
    Chen, Wei
    Dai, Wenkai
    Wang, Zhiqiang
    Zhang, Guozheng
    Yan, Yan
    Xia, Changliang
    IET POWER ELECTRONICS, 2017, 10 (12) : 1638 - 1646
  • [18] Six-phase Three-level Neutral Point Clamped Inverter for Capacitor Voltage Balancing and Common-Mode Voltage Cancellation
    Wang, Shukai
    Fereydoonian, Mostafa
    Lee, Woongkul
    2021 THIRTY-SIXTH ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION (APEC 2021), 2021, : 1091 - 1096
  • [19] Three-level saddle space vector pulse width modulation strategy based on two-level space vector pulse width modulation for neutral-point-clamped three-level inverters
    Lyu, Jianguo
    Hu, Wenbin
    Wu, Fuyun
    Yao, Kai
    Wu, Junji
    IET POWER ELECTRONICS, 2016, 9 (05) : 874 - 882
  • [20] A Modified Carrier-Based PWM Strategy for Common Mode Voltage Elimination and Neutral Point Voltage Balance in a Unidirectional Three-Level Converter for AC Motor Drives
    Cheng, Hong
    Yuan, Wei
    Wang, Cong
    Zhao, Zhihao
    Hao, Junhao
    IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2024, : 11876 - 11887