Comparison of switching performance of high-speed GaN vertical MOSFETs with various gate structures based on TCAD simulation

To evaluate the impact of gate structures on the switching performance (R (on) Q (g)) and cost (required chip size, proportional to R (on) A) of GaN vertical MOSFETs, we calculated the R (on) AR (on) Q (g) of trench-gate structures with and without a countermeasure to reduce the electric field applied to the gate insulator, as well as a planar structure with various cell pitches, channel mobilities, and blocking voltages. When the blocking voltage was 600 V, the planar-gate structure achieved the lowest R (on) AR (on) Q (g) owing to its low Q (g)/A, despite the high R (on) A. However, when the blocking voltage was 1800 V, a trench-gate structure without the countermeasure achieved the lowest R (on) AR (on) Q (g) owing to its low R (on) A and optimal cell pitch. The R (on) AR (on) Q (g) of a trench-gate structure with a countermeasure and planar-gate structure became close with increasing channel mobility. This indicates that high channel mobility is the most important factor, rather than the selection of the device structure.