Extraction of non-quasi-static model parameters for cylindrical gate-stacked junction-less accumulation mode MOSFET and its implementation as RF filters for circuit applications

被引:1
作者
Kumar, Jitender [1 ]
Mahajan, Aparna N. [1 ]
Deswal, S. S. [2 ]
Saxena, Amit [3 ]
Gupta, R. S. [3 ]
机构
[1] Maharaja Agrasen Univ, Dept Elect & Commun Engn, Baddi 174103, Himachal Prades, India
[2] Maharaja Agrasen Inst Technol, Dept Elect & Elect Engn, Delhi 110086, India
[3] Maharaja Agrasen Inst Technol, Dept Elect & Commun Engn, Delhi 110086, India
来源
MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS | 2023年 / 29卷 / 10期
关键词
DESIGN;
D O I
10.1007/s00542-023-05524-8
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The small signal model of MOSFET is a must for implementation of analog/digital circuits. The non-quasi-static (NQS) model is well known and provides accurate parameters for MOSFET. In the present work, extrinsic and intrinsic NQS model parameters were extracted for 20 nm Gate Stacked Junction-less Accumulation Mode (GSJAM) MOSFET using two-port admittance parameters. Further, for analog/RF applications, the first order active high pass filter (HPF), low pass filter (LPF) and second order active HPF, LPF are implemented using 20 nm GSJAM MOSFET. The first order and second order active filters are implemented for 10 GHz circuit applications. For amplifying the processed filtered input signal, a CMOS single stage common source voltage amplifier is used in the output circuit. Filter circuits use GSJAM N-type MOSFET as an active load in conjunction with a passive capacitor. With cut-off frequency, further bode-plot analysis of the low pass filter and high pass filter circuits is conducted. For numerical simulation, the well-known silvaco CAD tool is used.
引用
收藏
页码:1431 / 1442
页数:12
相关论文
共 25 条
  • [1] An Adjustable Dual-Output Current Mode MOSFET-Only Filter
    Akbari, Meysam
    Hussein, Safwan Mawlood
    Hashim, Yasir
    Tang, Kea-Tiong
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2021, 68 (06) : 1817 - 1821
  • [2] A Complete Small-Signal MOSFET Model and Parameter Extraction Technique for Millimeter Wave Applications
    Cao, Yang
    Zhang, Wei
    Fu, Jun
    Wang, Quan
    Liu, Linlin
    Guo, Ao
    [J]. IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2019, 7 (01) : 398 - 403
  • [3] RF Performance and Small-Signal Parameter Extraction of Junctionless Silicon Nanowire MOSFETs
    Cho, Seongjae
    Kim, Kyung Rok
    Park, Byung-Gook
    Kang, In Man
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2011, 58 (05) : 1388 - 1396
  • [4] Accurate and Computationally Efficient Modeling of Nonquasi Static Effects in MOSFETs for Millimeter-Wave Applications
    Gupta, Chetan
    Mohamed, Noor
    Agarwal, Harshit
    Goel, Ravi
    Hu, Chenming
    Chauhan, Yogesh Singh
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2019, 66 (01) : 44 - 51
  • [5] Analytical modeling of dual-metal gate stack engineered junctionless accumulation-mode cylindrical surrounding gate (DMGSE-JAM-CSG) MOSFET
    Gupta, Sumedha
    Pandey, Neeta
    Gupta, R. S.
    [J]. APPLIED PHYSICS A-MATERIALS SCIENCE & PROCESSING, 2021, 127 (07):
  • [6] Complete high-frequency thermal noise modeling of short-channel MOSFETs and design of 5.2-GHz low noise amplifier
    Han, K
    Gil, J
    Song, SS
    Han, J
    Shin, H
    Kim, CK
    Lee, K
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2005, 40 (03) : 726 - 735
  • [7] Kavita S C., 2019, PROC 2 INT C INNOV E, P7
  • [8] Kranzer D, 2021, 2021 23 EUR C POW EL, DOI [10.23919/EPE21ECCEEurope50061.2021.9570485, DOI 10.23919/EPE21ECCEEUROPE50061.2021.9570485]
  • [9] Analog and RF Performance Evaluation of Junctionless Accumulation Mode (JAM) Gate Stack Gate All Around (GS-GAA) FinFET
    Kumar, Bhavya
    Chaujar, Rishu
    [J]. SILICON, 2021, 13 (03) : 919 - 927
  • [10] High-k Dielectric Double Gate Junctionless (DG-JL) MOSFET for Ultra Low Power Applications- Analytical Model
    Kumar, Prashant
    Vashishath, Munish
    Gupta, Neeraj
    Gupta, Rashmi
    [J]. SILICON, 2022, 14 (13) : 7725 - 7734