Stress Analysis for Silicon Die Pick-up Process Through Finite Element Analysis

As electronic packaging continues to miniaturize, silicon dies are becoming progressively thinner. Thin die leads to many defects in the semiconductor process. The reason for the defect is that the needle pin peels off the carrier tape and silicon die, applying a large stress on the silicon die. In this study, the needle pin pick-up process was performed through finite element analysis, and the possibility of silicon die cracking was analyzed as the process conditions such as the silicon die thickness, adhesive layer thickness, and distance between the silicon die thickness and the vacuum support area changed the stress on the silicon die. In addition, the finite element models were divided into two models according to whether the needle pin was adopted. Consequently, a more conservative stress value was obtained when the finite element analysis was performed by containing the needle pin geometry into the boundary conditions without drawing it.