A Low-Power Capacitorless LDO Regulator with Transient Enhancement Structure

被引：0
|
作者：
Zheng, Lixia [1 ]
Zhu, Yi [1 ]
Xian, Huiyong [1 ]
Li, Jinwen [1 ]
Wan, Chenggong [1 ]
Wu, Jin [1 ]
Sun, Weifeng [1 ]
机构：
[1] Southeast Univ, Dept Integrated Circuit, Nanjing 210096, Peoples R China
来源：
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS | 2024年 / 33卷 / 03期
关键词：
Low-dropout regulator (LDO); operational transconductance amplifier (OTA); transient enhancement; low power; dynamic biasing; super source follower (SSF); DROP-OUT REGULATOR;
D O I：
10.1142/S021812662450049X
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper, a portable low-power low dropout regulator (LDO) with no output capacitance has been designed in 0.18-mu m CMOS technology. In this paper, a PMOS power transistor is used and combined with an overshoot and undershoot suppression circuit to improve the transient response of the circuit. A modified Class-AB operational transconductance amplifier (OTA) is used to reduce power consumption and act as an error amplifier to eliminate low frequency poles. At the same time, a super source follower and a Miller capacitor are used for frequency compensation of the system. Finally, the system can provide a stable voltage for a load step from 0.2 to 25mA in 500 ns edge-time for 140 pF-load capacitance. The test results show that the circuit achieves a good voltage regulation rate and high transient response.
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收藏
页数：15
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