Correlation analysis on local capacitance-voltage profiles of a SiO2/SiC interface observed by time-resolved scanning nonlinear dielectric microscopy

被引：0

作者：

Yamasue, Kohei ^{[1
]}

Cho, Yasuo ^{[1
]}

机构：

[1] Tohoku Univ, Sendai, Miyagi, Japan

来源：

2023 7TH IEEE ELECTRON DEVICES TECHNOLOGY & MANUFACTURING CONFERENCE, EDTM | 2023年

基金：

日本学术振兴会;

关键词：

SiC; Scanning nonlinear dielectric microscopy;

D O I：

10.1109/EDTM55494.2023.10103002

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Local capacitance-voltage profiling of an NO nitrided SiO2/SiC wafer is performed by using time-resolved scanning nonlinear dielectric microscopy. Nanoscale fluctuations of local capacitance-voltage profiles are analyzed in a real space to extract various images relevant to charge states such as fixed charges and defects at the SiO2/SiC interface. We perform correlation analysis of the extracted images and estimate the density fluctuations of fixed charges at the interface. In addition, we visualize the spatial variations of interface charge states as the voltage sweeps, which reflects interface defect density.

引用

页数：3

共 4 条

[1]

Cho Y., 2020, Scanning Nonlinear Dielectric Microscopy: Investigation of Ferroelectric, Dielectric, and Semiconductor Materials and Devices

[2] Material science and device physics in SiC technology for high-voltage power devices [J].