TD-NAAS: Template-Based Differentiable Neural Architecture Accelerator Search

被引:0
|
作者
Lim, HaYoung [1 ]
Jang, Yeseo [1 ]
Kim, Juyeon [1 ]
Sim, Jaehyeong [1 ]
机构
[1] Ewha Womans Univ, Dept Comp Sci & Engn, Seoul, South Korea
关键词
HW/SW Co-Design; Neural Architecture Search;
D O I
10.1109/ISOCC59558.2023.10396202
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This work presents TD-NAAS, a template-based differentiable approach towards the co-design of neural networks and hardware accelerator. Each neural operator is paired with the optimal hardware block that executes it efficiently, which is called a template. This approach reduces the search space by eliminating hardware design parameters and guarantees the most efficient accelerator. Evaluation results show that our method can build a neural network with higher accuracy and an accelerator with lower latency compared to the existing works.
引用
收藏
页码:143 / 144
页数:2
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