Modeling, Stability, and Design of the Single-Phase SOGI-Based Phase-Locked Loop Considering the Frequency Feedback Loop Effect

被引:20
作者
Xu, Jinming [1 ]
Qian, Hao [1 ]
Qian, Qiang [2 ]
Xie, Shaojun [1 ]
机构
[1] Nanjing Univ Aeronaut & Astronaut, Coll Automat Engn, Nanjing 211100, Peoples R China
[2] Hohai Univ, Coll Energy & Elect Engn, Nanjing 211100, Peoples R China
基金
中国国家自然科学基金;
关键词
Phase locked loops; Inverters; Power system stability; Impedance; Pulse width modulation; Mathematical models; Stability criteria; Grid-connected inverter; phase-locked loop; second-order generalized integrator; stability; weak grid; CONTROLLER;
D O I
10.1109/TPEL.2022.3201252
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
For single-phase grid-connected inverters, the second-order generalized integrator-based phase-locked loop (SOGI-PLL) is widely used for good harmonics attenuation and frequency adaptability. However, existing studies usually neglect the frequency feedback loop in the modeling and design process, and thus, the potential instability caused by the frequency feedback loop is not well explained. Besides, the improper design of SOGI-PLL can lead to the inverter instability both under ideal and weak grid conditions. Therefore, by fully considering the coupling of the frequency feedback loop, this article establishes an accurate model for SOGI-PLL. Furthermore, effects of different PLL parameters on behaviors of both the SOGI-PLL itself and the inverter are studied, based on which a graphical method for PLL parameters design is proposed. As proved, the frequency feedback loop can deteriorate the stability and performance of both SOGI-PLL itself and inverter system, especially if rapid transient is expected. The modeling method is also extended to the low-pass filter-SOGI-PLL and the improved parameters design is discussed. Experimental results verify the correctness of the proposed PLL model and the abovementioned analysis results. The proposed model is helpful to deeply reveal the instability mechanism and provides a reference for the PLL design under nonideal grid conditions.
引用
收藏
页码:987 / 1002
页数:16
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