A Resource-Efficient Scalable Spiking Neural Network Hardware Architecture With Reusable Modules and Memory Reutilization

In this brief, a cost-efficient and scalable spiking convolution neural network architecture is proposed. Reusable modules are designed to reduce hardware resource consumption by leveraging the structural similarity of each convolutional layer and pooling layer in spiking convolutional neural network (SCNN). Taking advantage of time-driven neural processing, memory reutilization is applied to reduce the memory for storing neural states. Benefit from these reusable modules, the proposed architecture demonstrates outstanding scalability. Two SCNN structures (named SCNN I and SCNN II) with different complexities and scales are designed to handle different classification tasks. The experiments are conducted using Xilinx Kintex-7 FPGA, operating at a clock frequency of 100 MHz. SCNN I and SCNN II achieve accuracy results of 98.15% and 85.71% respectively on the MNIST and CIFAR-10 datasets. Additionally, the energy consumption for each classification task is recorded as 0.015mJ and 0.724mJ. These results highlight the suitability of the proposed architecture for deployment in resource-constrained real-time edge processing scenarios.