Extracting Total Ionizing Dose Threshold Voltage Shifts From Ring Oscillator Circuit Response

被引:1
作者
Clark, Lawrence T. [1 ,2 ]
Young-Sciortino, Clifford S. [2 ,3 ]
Guertin, Steven M. [4 ]
Brown, William E. [5 ]
Holbert, Keith E. [2 ]
Bikkina, Phaneendra [6 ]
Bhanushali, Sumukh [6 ]
Levy, Andrew [6 ]
Turowski, Marek [6 ]
Butler, Jim D. [4 ]
机构
[1] LTC Design LLC, Phoeinx, AZ 85048 USA
[2] Arizona State Univ, ECEE Dept, Tempe, AZ 85287 USA
[3] Jet Prop Lab, Pasadena, CA 91109 USA
[4] CALTECH, Jet Prop Lab, Pasadena, CA 91125 USA
[5] Ellutions LLC, Chandler, AZ 85286 USA
[6] Alphacore Inc, Tempe, AZ 85281 USA
基金
美国国家航空航天局;
关键词
Logic gates; Transistors; Silicon-on-insulator; Threshold voltage; Standards; Radiation effects; Electrostatic discharges; Total ionizing dose; silicon on insulator; reliability assessment; VARIABILITY; DEPENDENCE; DEVICES;
D O I
10.1109/TDMR.2023.3244102
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Total ionizing dose (TID) has a significant effect on silicon on insulator circuits, manifest primarily as a front gate threshold voltage (Vt) shift. This paper presents a simple ring oscillator (RO) test structure that is amenable to packaging and gamma irradiation. RO current and frequency changes due to TID are experimentally measured in-situ. The RO responses are then used to extract the transistor level Vt shifts using an optimization approach. Since the optimization uses the actual circuits, the resulting Vt shifts may be directly applied to post TID modeling of circuit behavior. The approach simplifies the effort for design and testing to determine TID degradation. The test chip fabricated and measured for this work is implemented on a 22 nm fully depleted silicon on insulator (FDSOI) with thin oxides. The approach is, however, applicable to any fabrication process. Finally, we show the extracted Vt changes due to TID vary with the transistor Vt (doping and well type).
引用
收藏
页码:162 / 171
页数:10
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