A 12-Phase and 5-GHz PLL with a Subfeedback Loop Technique

This study develops a multiphase voltage-controlled oscillator (VCO) by using the subfeedback loop technique. The proposed N-stage ring oscillator with k-stage subfeedback loops (where N is not a multiple of k) has N output phases, and its operating frequency is as high as that of the k-stage subfeedback loops. Circuit analysis and simulation processes for design optimization are presented herein. The first-order linear inverter model of the proposed ring oscillator defines the relationship between its operating frequency and phase number. In the topology of the proposed oscillator, the operating frequency does not decrease as the number of stages of the ring oscillator increases. The proposed multiphase VCO is verified in a 5-GHz 12-phase phase-locked loop. The test chip is implemented in a 0.18-mu m complementary metal-oxide-semiconductor process, and its core area is determined to be 260 x 355 mu m(2). The root mean square jitter and peak-to-peak jitter are 1.03 and 8.85 ps, respectively. The phase noise of the output signal is - 91.44 dBc/Hz at 1-MHz.