DC operating points of Mott neuristor circuits

被引:0
|
作者
Wright, Joseph P. [1 ]
Sarles, Stephen A. [2 ]
Pei, Jin-Song [3 ]
机构
[1] Weidlinger Associates Inc, Div Appl Sci, New York, NY USA
[2] Univ Tennessee, Knoxville, TN USA
[3] Univ Oklahoma, Norman, OK USA
关键词
Neuristor; Mott memristor; DC operating points; Stiff ODEs; Hysteresis; Negative differential resistance; Threshold switching; Steady-state; Well-posedness;
D O I
10.1016/j.mee.2023.112124
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In 1960 Hewitt Crane conceptualized neuristors as electronic logic networks that could mimic action potential generation by biological neurons. In 2012 Mott memristors were presented as nano-scale electronic devices for physically constructing neuristor networks. Both the original Mott memristor model and the simplified model presented in 2020 are stiff nonlinear first-order ordinary differential equations (ODEs) that describe the voltage controlled threshold switching and current controlled negative differential resistance, attributed to a Mott insulator-to-metal phase transition. By design, a Mott neuristor contains two identical Mott memristors plus linear resistors and capacitors (no inductors), which enables alternating threshold switching by the memristors to generate periodic (AC) output voltage spikes in response to a DC current or voltage input. This paper presents a steady-state analysis of dynamic neuristor models, including four-, five-, and six-state variables (each of which is a system of first-order ODEs involving the states) based on the original phenomenological model of the Mott memristor. Specifically, it reveals the unique stable operating points that occur for applied currents or voltages below the amounts needed to induce resistive switching. These DC operating points represent the physically meaningful "OFF" states for the circuit when the neuristor does not output voltage spikes. Jacques Hadamard's mathematical criteria for a well-posed physical model (existence, uniqueness, continuity, stability) motivated the search for these DC operating points (OFF states), which are needed for efficiently initializing neuristor models before conducting dynamic neuristor simulations. The key result of our analysis is the neuristor steady-state eq. (29) which is useful for understanding neuristor OFF states as well as the role of negative-differential resistance (NDR) in the operation of the Mott memristor model and neuristor circuits. In addition to the steady-state analysis, three numerical examples of dynamic neuristor circuit operation are also given and MATLAB code for the dynamic four-state model is available for interested readers.
引用
收藏
页数:9
相关论文
共 50 条
  • [1] Dc Operating Points of Mott Neuristor Circuits
    Wright, Joseph P.
    Sarles, Stephen A.
    Pei, Jin-Song
    SSRN, 2023,
  • [2] DC operating points of transistor circuits
    Trajkovic, Ljiljana
    IEICE NONLINEAR THEORY AND ITS APPLICATIONS, 2012, 3 (03): : 287 - 300
  • [3] Bounds for the number of DC operating points of transistor circuits
    AT&T Labs-Research, Florham Park, United States
    IEEE Trans Circuits Syst I Fundam Theor Appl, 10 (1216-1221):
  • [4] ON THE TOPOLOGY OF FET CIRCUITS AND THE UNIQUENESS OF THEIR DC OPERATING POINTS
    WILLSON, AN
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1980, 27 (11): : 1045 - 1051
  • [5] Bounds for the number of DC operating points of transistor circuits
    Lagarias, JC
    Trajkovic, L
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS, 1999, 46 (10): : 1216 - 1221
  • [6] Threading homotopies and DC operating points of nonlinear circuits
    Geoghegan, R
    Lagarias, JC
    Melville, RC
    SIAM JOURNAL ON OPTIMIZATION, 1998, 9 (01) : 159 - 178
  • [7] DC operating points of nonlinear circuits and generalized Carleman linearization
    Weber, Harry
    Mathis, Wolfgang
    COMPEL-THE INTERNATIONAL JOURNAL FOR COMPUTATION AND MATHEMATICS IN ELECTRICAL AND ELECTRONIC ENGINEERING, 2023, 42 (03) : 787 - 803
  • [8] Analysis of CMOS circuits having multiple DC operating points
    Halgas, Stanislaw
    Tadeusiewicz, Michal
    PRZEGLAD ELEKTROTECHNICZNY, 2011, 87 (05): : 40 - 42
  • [9] Multiparameter homotopy methods for finding DC operating points of nonlinear circuits
    Wolf, DM
    Sanders, SR
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS, 1996, 43 (10): : 824 - 838
  • [10] Limitations of criteria for testing transistor circuits for multiple dc operating points
    Kronenberg, L
    Mathis, W
    Trajkovic, L
    PROCEEDINGS OF THE 43RD IEEE MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I-III, 2000, : 1156 - 1159