A complete SHA-3 hardware library based on a high efficiency Keccak design

被引:2
作者
Camacho-Ruiz, Eros [1 ]
Sanchez-Solano, Santiago [1 ]
Martinez-Rodriguez, Macarena C. [1 ]
Brox, Piedad [1 ]
机构
[1] Univ Seville, CSIC, IMSE, Inst Microelect Sevilla, Seville, Spain
来源
2023 IEEE NORDIC CIRCUITS AND SYSTEMS CONFERENCE, NORCAS | 2023年
基金
欧盟地平线“2020”;
关键词
Keccak; SHA-3; System-On-Chip;
D O I
10.1109/NorCAS58970.2023.10305448
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Hash functions are a crucial part of the cryptographic primitives. So much so that in 2007 a new competition was launched to select new standards for the SHA-3 function, which was won by Keccak. Since then, many software and hardware implementations have been submitted, claiming to reduce the number of operation cycles or increase design efficiency. Thus, this work aims to present a new hardware solution for the Keccak function, which forms the core of SHA-3, that achieves a high degree of tunability and is competitive with the state of the art. In addition, this work presents the integration of these designs into a hardware IP module together with the relevant drivers and functions that allow their use in software environments. Preliminary tests have shown an acceleration of up to 10 times compared to pure software code.
引用
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页数:7
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