Artificial Neural Network Based on Memristive Circuit for High-Speed Equalization

被引:0
|
作者
Luo, Zhang [1 ]
Du, Sichun [2 ]
Zhang, Zedi [2 ]
Lv, Fangxu [1 ]
Hong, Qinghui [2 ]
Lai, Mingche [1 ]
机构
[1] Natl Univ Def Technol, Sch Comp, Changsha 410073, Peoples R China
[2] Hunan Univ, Coll Comp Sci & Elect Engn, Changsha 410082, Peoples R China
关键词
Artificial neural networks; Memristors; Equalizers; Hardware; Bit error rate; Neurons; Programming; Memristor; circuit design; equalizer; artificial neural network; 4-level pulse amplitude modulation; FIR FILTER; IMPLEMENTATION; TRANSMITTER; EQUALIZERS; RECEIVER; POINT; FFE;
D O I
10.1109/TCSI.2023.3348990
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The limitations of traditional von Neumann architectures and digital computing are the bottlenecks for high-speed signal processing capabilities, not to mention the explosion of information growth. To tackle this challenge, this paper proposes an artificial neural network (ANN) equalizer based on the memristor for high-speed channel transmission at 112Gbps with 4-level pulse amplitude modulation (PAM4). To implement the PAM4 signal decision circuit based on the softmax algorithm, a comparator is used to make binary decisions for each output, and the only high-level output is further selected for the decision-making. The simulations on the PSPICE platform reveal that the number of input taps and the location of the main tap have the greatest impact on bit error rate (BER) performance. With optimal parameters, the circuit can achieve an impressive BER performance as low as 3.45E-6. To the best of our knowledge, this is the first implementation of channel equalization using memristive circuits, providing a valuable reference for analog circuit implementations of neural network equalizers.
引用
收藏
页码:1745 / 1756
页数:12
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