共 5 条
- [1] FPGA implementation of Combined AES-128 2017 8TH INTERNATIONAL CONFERENCE ON COMPUTING, COMMUNICATION AND NETWORKING TECHNOLOGIES (ICCCNT), 2017,
- [3] AES-128 cipher.: High speed, low cost FPGA implementation 2007 3RD SOUTHERN CONFERENCE ON PROGRAMMABLE LOGIC, PROCEEDINGS, 2007, : 195 - +
- [4] A Novel AES-256 Implementation on FPGA using Co-processor based Architecture PROCEEDINGS OF THE 2012 INTERNATIONAL CONFERENCE ON ADVANCES IN COMPUTING, COMMUNICATIONS AND INFORMATICS (ICACCI'12), 2012, : 632 - 638
- [5] Differential power analysis attacks against AES circuits implemented on a FPGA ICIW 2007: PROCEEDINGS OF THE 2ND INTERNATIONAL CONFERENCE ON INFORMATION WARFARE AND SECURITY, 2007, : 117 - 122