Desat Protection With Ultrafast Response for High-Voltage SiC MOSFETs With High dv/dt

被引:4
作者
Huang, Xingxuan [1 ]
Li, Dingrui [2 ]
Lin, Min [2 ]
Tolbert, Leon M. [2 ]
Wang, Fred [2 ]
Giewont, William [3 ]
机构
[1] Analog Devices Inc, San Jose, CA 95110 USA
[2] Univ Tennessee, Min H Kao Dept Elect Engn & Comp Sci, Knoxville, TN 37996 USA
[3] EPC Power, Poway, CA 92064 USA
来源
IEEE OPEN JOURNAL OF INDUSTRY APPLICATIONS | 2024年 / 5卷
关键词
High-voltage SiC MOSFETs; desat protection; ultrafast response; high dv/dt; noise immunity; 10; KV; IMMUNITY; DESIGN; SYSTEM;
D O I
10.1109/OJIA.2024.3353309
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This article presents a desat protection scheme with the ultrafast response for high-voltage (>3.3 kV) SiC MOSFETs. Its working principle is the same as the conventional desat protection designed for high-voltage SiC MOSFETs, yet its blanking time is implemented by fully considering the influence of high negative dv(ds)/dt during the fast turn-on transient. With the same circuitry as the conventional desat protection, the proposed protection scheme can significantly shorten the response time of the desat protection when it is used to protect high-voltage SiC MOSFETs. In addition, the proposed protection scheme with ultrafast response features strong noise immunity, low-cost, and simple implementation. By taking advantage of the high dv/dt during the normal turn-on transients, the proposed protection scheme can be even faster when the MOSFET has a faster switching speed. Design details and the response speed analysis under various short circuit faults are presented in detail. A half bridge phase leg based on discrete 10 kV/20 A SiC MOSFETs is built to demonstrate the proposed protection scheme. Experimental results at 6.5 kV validate the ultrafast response (115 ns response time under a hard switching fault, 155 ns response time under a fault under load), and strong noise immunity of the proposed desat protection scheme.
引用
收藏
页码:94 / 105
页数:12
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