Compliance-tunable thermal interface materials based on vertically oriented carbon fiber arrays for high-performance thermal management

被引:31
作者
Li, Junwei [1 ,2 ]
Ye, Zhenqiang [2 ]
Mo, Pingjing [2 ]
Pang, Yunsong [2 ]
Gao, Enze [2 ]
Zhang, Chenxu [2 ]
Du, Guoping [1 ]
Sun, Rong [2 ]
Zeng, Xiaoliang [2 ]
机构
[1] Nanchang Univ, Sch Mat Sci & Engn, Nanchang 330031, Peoples R China
[2] Chinese Acad Sci, Shenzhen Inst Adv Elect Mat, Shenzhen Inst Adv Technol, Shenzhen 518055, Peoples R China
基金
中国国家自然科学基金;
关键词
Thermal interface material; Carbon fiber; Vertical orientation; Thermal conductivity; NANOWIRE ARRAYS; CONDUCTIVITY; FUTURE; NANOCOMPOSITES; ELECTRONICS; COMPOSITES; CHALLENGES;
D O I
10.1016/j.compscitech.2023.109948
中图分类号
TB33 [复合材料];
学科分类号
摘要
With the ever-shrinking characteristic dimension of chips and the increasing of packaging density, heat dissipation has become the most critical technology challenge for electronic devices. The development of highperformance thermal interface materials (TIMs) for enhancing thermal coupling and minimizing thermal resistance between heterogeneous components is the key to achieving efficient thermal management of electronic devices. Herein, we report a high-performance carbon fiber/polydimethylsiloxane (CF/PDMS) TIM based on the construction of vertically oriented carbon fiber arrays and the modulation of PDMS's crosslinking density. The resulting CF/PDMS TIM exhibits highly desirable characteristics of through-plane thermal conductivity up to 43.47 W/m center dot K (only 20 vol% loading), outstanding elastic compliance similar to soft biological tissues (stress similar to 35 kPa at 35% compressive strain), and excellent resilience performance (resilience rate of 85% after compression cycles). In addition, the heat dissipation capability of CF/PDMS TIM is improved further by forming interconnected heat-conducting structures on the CF/PDMS TIM's surface. The optimal CF/PDMS TIM in microprocessor cooling application exhibits superior heat dissipation capability and stability during 1000 power cycles, resulting in a 68 degrees C reduction in the chip temperature compared with the state-of-the-art commercial TIM. This work opens up a new avenue for fabricating high-performance TIMs that meet the heat dissipation requirements of high-performance computing.
引用
收藏
页数:9
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