Impact of Noise and Interface Trap Charge on a Heterojunction Dual-Gate Vertical TFET Device

被引：4

作者：

Nasani, Karthik ^{[1
]}

Bhowmick, Brinda ^{[1
]}

Pukhrambam, Puspa Devi ^{[1
]}

机构：

[1] Natl Inst Technol, Dept Elect & Commun Engn, Silchar 788010, Assam, India

来源：

JOURNAL OF ELECTRONIC MATERIALS | 2024年 / 53卷 / 04期

关键词：

Band-to-band tunneling; heterojunction; dual material gate; noise; uniform and Gaussian traps; PERFORMANCE;

D O I：

10.1007/s11664-024-10927-y

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Herein, a vertical T-shaped heterojunction tunnel field-effect transistor (TFET) structure is proposed. This paper explores the effect of the traps and noise on the electrical characteristics. TFET devices work on the principle of band-to-band tunneling (BTBT). In order to increase the BTBT rate, the proposed structure uses an InP/In0.47Ga0.53 as the heterojunction at the source. In addition, this structure has dual metal gates: gate 1 with a 4.3 eV work function and gate 2 with a 4.1 eV work function. The effect of noise on device performance is investigated in terms of the voltage noise spectral density (Svg) and current noise spectral density (Sid), and the noise spectral densities are compared in the presence of interface trap concentrations. Finally, the variation in noise density with frequency is examined.

引用

页码：2181 / 2190

页数：10

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