A Novel Enhancement-Mode Gallium Nitride p-Channel Metal Insulator Semiconductor Field-Effect Transistor with a Buried Back Gate for Gallium Nitride Single-Chip Complementary Logic Circuits

被引:1
作者
Wang, Haochen [1 ]
Chen, Kuangli [1 ]
Yang, Ning [1 ]
Zhu, Jianggen [1 ]
Duan, Enchuan [1 ]
Huang, Shuting [1 ]
Zhao, Yishang [1 ]
Zhang, Bo [1 ]
Zhou, Qi [1 ,2 ]
机构
[1] Univ Elect Sci & Technol China UESTC, Sch Integrated Circuit Sci & Engn, State Key Lab Elect Thin Films & Integrated Device, Chengdu 611731, Peoples R China
[2] UESTC Guangdong, Inst Elect & Informat Engn, Dongguan 523808, Peoples R China
基金
中国国家自然科学基金;
关键词
gallium nitride (GaN); p-channel; MISFET; back gate; enhancement-mode; subthreshold slope; I-ON/I-OFF; GAN; FINFET; FET;
D O I
10.3390/electronics13040729
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this work, a novel enhancement-mode GaN p-MISFET with a buried back gate (BBG) is proposed to improve the gate-to-channel modulation capability of a high drain current. By using the p-GaN/AlN/AlGaN/AlN double heterostructure, the buried 2DEG channel is tailored and connected to the top metal gate, which acts as a local back gate. Benefiting from the dual-gate structure (i.e., top metal gate and 2DEG BBG), the drain current of the p-MISFET is significantly improved from -2.1 (in the conv. device) to -9.1 mA/mm (in the BBG device). Moreover, the dual-gate design also bodes well for the gate to p-channel control; the subthreshold slope (SS) is substantially reduced from 148 to similar to 60 mV/dec, and such a low SS can be sustained for more than 3 decades. The back gate effect and the inherent hole compensation mechanism of the dual-gate structure are thoroughly studied by TCAD simulation, revealing their profound impact on enhancing the subthreshold and on-state characteristics in the BBG p-MISFET. Furthermore, the decent device performance of the proposed BBG p-MISFET is projected to the complementary logic inverters by mixed-mode simulation, showcasing excellent voltage transfer characteristics (VTCs) and dynamic switching behavior. The proposed BBG p-MISFET is promising for developing GaN-on-Si monolithically integrated complementary logic and power devices for high efficiency and compact GaN power IC.
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页数:15
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共 38 条
  • [1] Gate-Recessed E-mode p-Channel HFET With High On-Current Based on GaN/AlN 2D Hole Gas
    Bader, Samuel James
    Chaudhuri, Reet
    Nomoto, Kazuki
    Hickman, Austin
    Chen, Zhen
    Then, Han Wui
    Muller, David A.
    Xing, Huili Grace
    Jena, Debdeep
    [J]. IEEE ELECTRON DEVICE LETTERS, 2018, 39 (12) : 1848 - 1851
  • [2] A GaN Complementary FET Inverter With Excellent Noise Margins Monolithically Integrated With Power Gate-Injection HEMTs
    Chen, Jiabo
    Liu, Zhihong
    Wang, Haiyong
    He, Yue
    Zhu, Xiaoxiao
    Ning, Jing
    Zhang, Jincheng
    Hao, Yue
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2022, 69 (01) : 51 - 56
  • [3] GaN-on-Si Power Technology: Devices and Applications
    Chen, Kevin J.
    Haeberlen, Oliver
    Lidow, Alex
    Tsai, Chun Lin
    Ueda, Tetsuzo
    Uemoto, Yasuhiro
    Wu, Yifeng
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2017, 64 (03) : 779 - 795
  • [4] Progress in High Voltage SiC and GaN Power Switching Devices
    Chow, T. Paul
    [J]. SILICON CARBIDE AND RELATED MATERIALS 2013, PTS 1 AND 2, 2014, 778-780 : 1077 - 1082
  • [5] Self-Aligned E-Mode GaN p-Channel FinFET With ION > 100 mA/mm and ION/IOFF > 107
    Chowdhury, Nadim
    Xie, Qingyun
    Palacios, Tomas
    [J]. IEEE ELECTRON DEVICE LETTERS, 2022, 43 (03) : 358 - 361
  • [6] Field-induced Acceptor Ionization in Enhancement-mode GaN p-MOSFETs
    Chowdhury, Nadim
    Xie, Qingyun
    Niroula, John
    Rajput, Nitul S.
    Cheng, Kai
    Then, Han Wui
    Palacios, Tomas
    [J]. 2020 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2020,
  • [7] Regrowth-Free GaN-Based Complementary Logic on a Si Substrate
    Chowdhury, Nadim
    Xie, Qingyun
    Yuan, Mengyang
    Cheng, Kai
    Then, Han Wui
    Palacios, Tomas
    [J]. IEEE ELECTRON DEVICE LETTERS, 2020, 41 (06) : 820 - 823
  • [8] p-Channel GaN Transistor Based on p-GaN/AlGaN/GaN on Si
    Chowdhury, Nadim
    Lemettinen, Jori
    Xie, Qingyun
    Zhang, Yuhao
    Rajput, Nitul S.
    Xiang, Peng
    Cheng, Kai
    Suihkonen, Sami
    Then, Han Wui
    Palacios, Tomas
    [J]. IEEE ELECTRON DEVICE LETTERS, 2019, 40 (07) : 1036 - 1039
  • [9] An Experimental Demonstration of GaN CMOS Technology
    Chu, Rongming
    Cao, Yu
    Chen, Mary
    Li, Ray
    Zehnder, Daniel
    [J]. IEEE ELECTRON DEVICE LETTERS, 2016, 37 (03) : 269 - 271
  • [10] Monolithic GaN Half-Bridge Stages With Integrated Gate Drivers for High Temperature DC-DC Buck Converters
    Cui, Miao
    Sun, Ruize
    Bu, Qinglei
    Liu, Wen
    Wen, Huiqing
    Li, Ang
    Liang, Yung C.
    Zhao, Cezhou
    [J]. IEEE ACCESS, 2019, 7 : 184375 - 184384