Debanking Techniques on Multi-bit Flip-flops for Reinforcing Useful Clock Skew Scheduling

被引:0
作者
Yang, Jaewan [1 ]
Kim, Taewhan [1 ]
机构
[1] Seoul Natl Univ, Sch Elect & Comp Engn, Seoul, South Korea
来源
2023 IEEE 36TH INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE, SOCC | 2023年
基金
新加坡国家研究基金会;
关键词
timing optimization; useful clock skew; multi-bit flop-flop; cell layout; physical design; DESIGN;
D O I
10.1109/SOCC58585.2023.10256966
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Using multi-bit flip-flops (MBFFs) rather than single-bit flip-flops (SBFFs) in circuit implementation provides a considerable benefit on saving the dynamic power consumed at the clock network. However, it strictly disables a full applicability of useful clock skew scheduling to individual flip-flops in MBFFs to optimize circuit timing. This is because the clock skew value, assigned to an MBFF according to the outcome of useful clock skew scheduling, is applied exhaustively and exclusively to its internal flip-flops all together. This work mitigates this inflexibility by devising useful skew aware MBFF debanking methodology at the post-route stage in physical design. Precisely, our method iteratively performs (1) extracting 'useful clock skew infeasible' MBFFs from circuit and building an MBFF dependency graph, (2) formulating and solving the problem of selecting MBFFs to be debanked for negative slack time minimization into a problem instance of finding a maximum weighted independent subset, (3) applying our timing-driven and power-minimal debanking technique to the MBFFs obtained in Step 2, and (4) optimizing timing by applying useful clock skew scheduling to the circuit updated by debanking in step 3. Through experiments with OpenCore benchmark circuits, it is shown that our proposed method of reinforcing the effectiveness of useful clock skew scheduling on a circuit with MBFF instances is able to reduce the worst and total negative slacks by 19.8% and 43.4% over that produced by the conventional MBFF debanking scheme.
引用
收藏
页码:138 / 143
页数:6
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