共 42 条
Intelligent Reflecting Surface Backscatter Enabled Multi-Tier Computing for 6G Internet of Things
被引:19
作者:
Xu, Sai
[1
]
Liu, Jiajia
[1
]
Kato, Nei
[2
]
Du, Yanan
[1
]
机构:
[1] Northwestern Polytech Univ, Sch Cybersecur, Natl Engn Lab Integrated Aerosp Ground Ocean Big D, Xian 710072, Shaanxi, Peoples R China
[2] Tohoku Univ, Grad Sch Informat Sci, Sendai 9808579, Japan
基金:
中国博士后科学基金;
中国国家自然科学基金;
关键词:
Backscatter;
Task analysis;
Servers;
Internet of Things;
Computational modeling;
Array signal processing;
Resource management;
Multi-tier computing system;
intelligent reflecting surface (IRS);
backscatter;
sum computational bits;
optimization;
POWER-CONTROL;
ENERGY;
DESIGN;
TRANSMISSION;
MINIMIZATION;
SYSTEMS;
SIGNAL;
D O I:
10.1109/JSAC.2022.3231861
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
This paper investigates a novel framework of intelligent reflecting surface (IRS) backscatter enabled multi-tier computing system. In such a hierarchical network, the data bits of computational task requested by each user equipment (UE) are broken up into three parts, which are respectively computed at tier-1 UEs, tier-2 access points (APs) and a tier-3 central server. Distinguished from conventional active antennas, IRS backscatter at the UEs is leveraged to offload data bits to the APs. Based on the established network framework, an optimization problem is formulated, which aims at maximizing the sum computational bits of system during the considered time block by jointly optimizing the active beamforming at the power beacon, the passive beamforming at the UEs, the active beamforming at the APs, the bandwidth and power allocation among all the UEs, as well as the time of local computing. To seek the optimal solution, the optimization problem is decomposed into two, namely the maximization of stage-1 sum computational bits and the minimization of stage-2 delay. By the objective function conversion and alternative optimization methods, the two problems are addressed. Extensive simulations are performed to confirm the feasibility of the proposed system and show the achievable performance in processing computational bits.
引用
收藏
页码:320 / 333
页数:14
相关论文