A machine learning low-dropout regulator-assisted differential power analysis attack countermeasure with voltage scaling

被引:2
作者
Cheng, Jiafeng [1 ]
Liu, Wenrui [1 ]
Sun, Nengyuan [1 ]
Peng, Zhaokang [1 ]
Sun, Caiban [1 ]
Wang, Chunyang [1 ]
Bi, Yijian [1 ]
Wen, Yiming [1 ]
Zhang, Hongliu [2 ]
Zhang, Pengcheng [2 ]
Yu, Weize [1 ]
机构
[1] Shandong Univ, Sch Microelect, Jinan 250101, Peoples R China
[2] TIH Microelect Ltd Corp, Jinan, Peoples R China
关键词
circuit optimization; hardware security; security analysis; VLSI design; DPA; DESIGN; LOGIC; MHZ;
D O I
10.1002/cta.3583
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
False key-controlled aggressive voltage scaling (FKCAVS) technique is a lightweight and effective leakage power analysis (LPA) attack countermeasure. However, the regular FKCAVS technique may not be utilized as a countermeasure against differential power analysis (DPA) attacks unconditionally. The primary reason is that the working frequency of DPA attacks is significantly higher than the corresponding frequency of LPA attacks. Thus, it is difficult to make the speed of voltage scaling keep pace with the speed of DPA attacks by employing the regular FKCAVS technique. In this paper, a fast FKCAVS technique is proposed to maximize the security of a cryptographic circuit (CC) against DPA attacks while minimizing the corresponding overhead by embedding a machine learning low-dropout (LDO) regulator (MLLR). As shown in the result, by deploying the proposed FKCAVS technique, the measurement-to-disclose (MTD) value against DPA attacks is maintained over 1 million with less than 17.4% power/area overhead.
引用
收藏
页码:3105 / 3117
页数:13
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